The Week Of Monday 17 July 2023 Archives by thread
Starting: Mon Jul 17 00:13:43 PDT 2023
Ending: Sun Jul 23 23:59:28 PDT 2023
Messages: 2891
- [PATCH] D155355: [AArch64] Set maximum vscale VF with shouldMaximizeVectorBandwidth
Dave Green via Phabricator via llvm-commits
- [PATCH] D154941: [mlir][ArmSME] Add custom get_tile_id and cast ops
Andrzej Warzynski via Phabricator via llvm-commits
- [PATCH] D154275: [llvm-exegesis] Support older kernel versions in subprocess executor
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D155389: [ValueTracking][ScalarEvolution] improving llvm.assume's support for the argument value without context & reducing the result range of ScalarEvolution::getRange using computeConstantRange
CaprYang via Phabricator via llvm-commits
- [PATCH] D155301: [ARM] Replace TransferImpOps with copyImplicitOps
Dave Green via Phabricator via llvm-commits
- [PATCH] D155233: [CMake] Switch the CMP0091 policy (MSVC_RUNTIME_LIBRARY) to the new behaviour
Martin Storsjö via Phabricator via llvm-commits
- [llvm] c6bd873 - [CMake] Switch the CMP0091 policy (MSVC_RUNTIME_LIBRARY) to the new behaviour
Martin Storsjö via llvm-commits
- [PATCH] D155255: [SCEV] Don't update the range value if empty
Florian Hahn via Phabricator via llvm-commits
- [compiler-rt] fa8401f - [compiler-rt][NFC] Avoid implicit-integer-sign-change in FuzzedDataProvider::ConsumeIntegralInRange
via llvm-commits
- [PATCH] D155146: Add SHA512 instructions.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D155377: [SanitizerCoverage] Add fallback DebugLocation for instrumented calls
Marco Elver via Phabricator via llvm-commits
- [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores
David Sherwood via Phabricator via llvm-commits
- [PATCH] D154756: [AArch64] Add scheduling model for Neoverse V1
Dave Green via Phabricator via llvm-commits
- [compiler-rt] b446c6d - cmake: set _LARGEFILE_SOURCE=1 to fix a cmake error
Sylvestre Ledru via llvm-commits
- [PATCH] D154647: [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.
Xinlong Wu via Phabricator via llvm-commits
- [llvm] 6a03631 - [SVE][CodeGen] Add more test cases for zero-extends of masked loads
David Sherwood via llvm-commits
- [PATCH] D152431: [Inliner] Handle convergence control when inlining a call
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D155147: Add SM3 instructions.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D155426: [AVR][NFC] Merge emitInstruction into encodeInstruction.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D154411: [RISCV][NFC] Simplify lowerVPOp.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D155145: Add AVX-VNNI-INT16 instructions.
Freddy, Ye via Phabricator via llvm-commits
- [llvm] 20280ea - [RISCV] Fix predicates on zvbb patterns
Luke Lau via llvm-commits
- [llvm] b5bcd4f - [RISCV] Add VL nodes and VP patterns for unary zvbb instructions
Luke Lau via llvm-commits
- [PATCH] D155313: [RISCV] Fix predicates on zvbb patterns
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155229: [RISCV] Add VL nodes and VP patterns for unary zvbb instructions
Luke Lau via Phabricator via llvm-commits
- [llvm] cc68e05 - [SVE][CodeGen] Improve codegen for some zero-extends of masked loads
David Sherwood via llvm-commits
- [PATCH] D155281: [SVE][CodeGen] Improve codegen for some zero-extends of masked loads
David Sherwood via Phabricator via llvm-commits
- [llvm] ec6af93 - [AArch64] NFC: Replace 'forceStreamingCompatibleSVE' with 'isNeonAvailable'.
Sander de Smalen via llvm-commits
- [PATCH] D155148: Add SM4 instructions.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D153499: [RISCV] Add support for custom CSRs for Sifive S76.
Zixuan Wu via Phabricator via llvm-commits
- [PATCH] D155175: [Clang] Fix consteval propagation for aggregates and defaulted constructors
Corentin Jabot via Phabricator via llvm-commits
- [PATCH] D151283: [llvm-cov] Support a Hierarchical Structure for HTML Coverage Report Generating
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D155329: [TableGen][CodeEmitterGen] Add support for querying operand bit offsets
Ilya Leoshkevich via Phabricator via llvm-commits
- [PATCH] D155428: [AArch64] Force streaming-compatible codegen when attributes are set.
Sander de Smalen via Phabricator via llvm-commits
- [llvm] 68f1391 - [ScalarizeMaskedMemIntrin] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [PATCH] D155418: [RISCV] Add bf16 as a valid type for the FPR16 register class.
Jun Sha via Phabricator via llvm-commits
- [PATCH] D155429: [AMDGPU] Add targets gfx1150 and gfx1151
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154414: [NFC][AMDGPU] Default initialize the Subtarget
Jakub Chlanda via Phabricator via llvm-commits
- [llvm] fd2de54 - [X86] Canonicalize vXi64 SIGN_EXTEND_INREG vXi1 to use v2Xi32 splatted shifts instead
Simon Pilgrim via llvm-commits
- [llvm] faca9fd - [AArch64] Regenerate CostModel tests with update_analyze_test_checks. NFC
David Green via llvm-commits
- [PATCH] D151047: [clang-format] Fix indent for selective formatting.
Owen Pan via Phabricator via llvm-commits
- [llvm] 3cd3f11 - [NFC][AMDGPU] Default initialize the Subtarget
Jakub Chlanda via llvm-commits
- [PATCH] D155274: [GIsel][AArch64] extend legalization of G_INSERT_VECTOR_ELT
Thorsten via Phabricator via llvm-commits
- [PATCH] D155307: [InstCombine] Allow KnownBits to be propagated
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D155431: [CMake] Clean up old code for handling MSVC runtime setting the old way
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D155068: [Remarks] Introduce `llvm-remark-diff` tool.
Francis Visoiu Mistrih via Phabricator via llvm-commits
- [PATCH] D155045: [llvm-objdump] Create ObjectFile specific dumpers
James Henderson via Phabricator via llvm-commits
- [PATCH] D155214: Preserve important metadata in JumpThreadingPass::unfoldSelectInstr
Roman Paukner via Phabricator via llvm-commits
- [PATCH] D155432: [AArch64][SME] Use `fmov` instead of NEON `movi` for FP value.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D155058: [Remark] Overload `<<` for Remark, RemarkType and RemarkLocation.
Francis Visoiu Mistrih via Phabricator via llvm-commits
- [PATCH] D155406: (WIP) [MemCpyOpt] implement multi BB stack-move optimization
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D155433: [RISCV] Add SDNode patterns for vandn.[vv,vx]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155434: [RISCV] Add VP patterns for vandn.[vv,vx]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155187: [RemarkUtil] Add an option to collect remark count information given a list of keys.
Francis Visoiu Mistrih via Phabricator via llvm-commits
- [PATCH] D154953: [InstCombine] Remove the remainder loop if we know the mask is always true
Paul Walker via Phabricator via llvm-commits
- [PATCH] D155436: InstSimplify: Handle basic folds for frexp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D155437: ValueTracking: Fix computeKnownFPClass canonicalize handling
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D155305: AMDGPU: Mark control flow pseudos as convergent
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D155308: AMDGPU: Make SI_END_CF convergent
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151887: InstSimplify: Start cleaning up simplifyFCmpInst
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153158: AMDGPU: Implement llvm.get.rounding
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155439: [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155440: ValueTracking: Make computeKnownFPClass respect UseInstrInfo
Matt Arsenault via Phabricator via llvm-commits
- [compiler-rt] 6f4f102 - [compiler-rt] [Arm] Make the tests for the runtime functions __aeabi_c{d,f} work on Big-Endian.
Simi Pallipurath via llvm-commits
- [PATCH] D155441: [ADT] Remove SFINAE constraint from llvm::iterator_range ctor
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D155443: AMDGPU: Preserve flags in fdiv_fast lowering
Matt Arsenault via Phabricator via llvm-commits
- [llvm] a2453c6 - [AMDGPU] Add test case for zext of f16 to i32
Jay Foad via llvm-commits
- [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true
Allen zhong via Phabricator via llvm-commits
- [llvm] 92542f2 - [AMDGPU] Add targets gfx1150 and gfx1151
Jay Foad via llvm-commits
- [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D155447: [AArch64] Fix an immediate out of range for large realignments on Windows
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D155449: DAG: Constant fold frexp nodes
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D146121: [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D153744: [LoopUnroll] adjust for new `convergent` semantics
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [llvm] a926a26 - [Triple] Add llvm::Triple::isLoongArch{32,64}
Weining Lu via llvm-commits
- [PATCH] D155163: [Triple] Add llvm::Triple::isLoongArch{32,64}
Lu Weining via Phabricator via llvm-commits
- [PATCH] D154954: [IRCE] Add NSW flag to main loop's indvar base
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D155451: AMDGPU: Fix broken denormal constant folding of canonicalize
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153698: [InstCombine] canonicalize multi xor as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS
Digger Lin via Phabricator via llvm-commits
- [PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D78038: [clangd] WIP: fix several bugs relating to include insertion
Sam McCall via Phabricator via llvm-commits
- [PATCH] D155455: [Serialization] Read main file's HeaderFileInfo from PCH even if changed
Sam McCall via Phabricator via llvm-commits
- [PATCH] D149966: [SLP]Include cost of the reshuffling for same nodes with resizing.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D154223: [llvm-cov] Allow multiple remaps in --path-equivalence
Tomas Camin via Phabricator via llvm-commits
- [PATCH] D155420: [PostDom] add findNearestCommonDominator for instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D155347: Documenting behaviour of ResourceRef (HWInstructionDispatchedEvent)
Andrea Di Biagio via Phabricator via llvm-commits
- [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D155415: [AIX][TLS] Account for local-exec accesses in XCOFFObjectWriter
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D98591: [CodeGen] Add extension points for TargetPassConfig::addMachinePasses
Raoul Gough via Phabricator via llvm-commits
- [PATCH] D155459: [AArch64] Change the cost of vector insert/extract to 2
Dave Green via Phabricator via llvm-commits
- [compiler-rt] 33acdc1 - [compiler-rt][xray] Fix alignment of XRayFileHeader
Leandro Lupori via llvm-commits
- [PATCH] D155013: [compiler-rt][xray] Fix alignment of XRayFileHeader
Leandro Lupori via Phabricator via llvm-commits
- [PATCH] D153967: [lit] Remove the --no-indirectly-run-check option
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Shivam Gupta via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Shivam Gupta via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Shivam Gupta via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Shivam Gupta via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Henrik G Olsson via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Shivam Gupta via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Henrik G Olsson via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Shivam Gupta via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
David Spickett via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
David Spickett via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
David Spickett via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
David Spickett via Phabricator via llvm-commits
- [PATCH] D142879: [RISCV] Emit relocation for uleb128
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D155461: [InstCombine] Keep !unpredictable when combining select+add
Paweł Bylica via Phabricator via llvm-commits
- [PATCH] D153268: [DWARFLinkerParallel] Add limited functionality to DWARFLinkerParallel.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D155412: [ConstraintElim] Add facts implied by MinMaxIntrinsic
Nikita Popov via Phabricator via llvm-commits
- [llvm] bca5501 - [IRCE] Add NSW flag to main loop's indvar base
Aleksandr Popov via llvm-commits
- [llvm] a23d6c7 - [NFC] Add test case for D154533.
Amaury Séchet via llvm-commits
- [PATCH] D154533: [DAG] Improve carry reconstruction in combineCarryDiamond.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D155464: [llvm-objdump] Use BBEntry::BBID to represent basic block numbers.
Rahman Lavaee via Phabricator via llvm-commits
- [PATCH] D155466: [RISCV] Match ext_vl+sra_vl/srl_vl+trunc_vector_vl to vnsra/vnsrl.
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D154738: [SLP]Introduce isLegalVectorOp to check if the vector instruction is going to be scalarized.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D155257: [llvm-profdata] Changed SampleProfWriter to take a range of of NameFunctionSamples
Wenlei He via Phabricator via llvm-commits
- [llvm] e9caa37 - [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits
Simon Pilgrim via llvm-commits
- [PATCH] D155327: [RISCV] Add FP compare test to condops.ll to show a missed opportunity to remove an xori. NFC
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D142569: [OpenMP] Introduce kernel environment
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D154869: [Flang] [FlangRT] Implement FlangRT library as solution to Flang's runtime LLVM integration
Paul Scoropan via Phabricator via llvm-commits
- [PATCH] D155470: [AArch64] LSLFast to fold onto base address by default
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D155391: [RISCV] Use RISCVISD::CZERO_EQZ/CZERO_NEZ for XVentanaCondOps.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D150264: [libcxx] Add strict weak ordering checks to sorting algorithms
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D155471: [ARM] Add a regression test for D154281
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151903: [Flang][MLIR][OpenMP][OMPIRBuilder] Use target triple to initialize `IsGPU` flag
Sergio Afonso via Phabricator via llvm-commits
- [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits (WIP)
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] d713297 - [RISCV] Add bf16 as a valid type for the FPR16 register class.
Craig Topper via llvm-commits
- [PATCH] D155473: [GuardWidening][Test] Illustrate incorrect insertion point case
Aleksandr Popov via Phabricator via llvm-commits
- [llvm] fda45d9 - [RISCV] Add FP compare test to condops.ll to show a missed opportunity to remove an xori. NFC
Craig Topper via llvm-commits
- [llvm] 4a8b124 - [AddressSanitizer] Add fallback DebugLocation for instrumented calls
Marco Elver via llvm-commits
- [llvm] 913f7e9 - [SanitizerCoverage] Add fallback DebugLocation for instrumented calls
Marco Elver via llvm-commits
- [PATCH] D155376: [AddressSanitizer] Add fallback DebugLocation for instrumented calls
Marco Elver via Phabricator via llvm-commits
- [llvm] 4eef2e3 - [ThreadSanitizer] Add fallback DebugLocation for memintrinsic calls
Marco Elver via llvm-commits
- [PATCH] D155246: [SLP]Improve stores vectorization.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D155476: [RISCV] Split BEXT and BEXTI Write classes. NFC.
Michael Maitland via Phabricator via llvm-commits
- [llvm] a64b3e9 - [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.
Craig Topper via llvm-commits
- [PATCH] D155478: [NewGVN] Abort PHIOfOps if found singleton PHI
Manuel Brito via Phabricator via llvm-commits
- [PATCH] D155478: [NewGVN] Abort PHIOfOps if singleton PHI is found
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D155481: [RISCV] A test for conditional binary ops.
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D143417: [InstCombine] Add fold for `(rem (mul/shl X, Y), (mul/shl X, Z))` -> `(mul X, (rem Y, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152677: [InstCombine] If there is a known-bit transform is_pow2 check to just check for any other bits
Noah Goldstein via Phabricator via llvm-commits
- [llvm] 703cdcd - [RISCV] Remove 'not FeatureStdExtC' from Zcmp predicate.
Craig Topper via llvm-commits
- [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [llvm] d17b518 - [gn] Port 8ac71b026ee6 (no more _LIBCPP_HAS_THREAD_LIBRARY_EXTERNAL)
Leonard Grey via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Hongyu Chen via Phabricator via llvm-commits
- [llvm] 4f95821 - [DAG] SelectionDAG::getNode() - consistently use N1 for first operand. NFCI.
Simon Pilgrim via llvm-commits
- [PATCH] D153963: [InstCombine] Fold binop of select and cast of select condition
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Hongtao Yu via Phabricator via llvm-commits
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wren romano via llvm-commits
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Anna Thomas via Phabricator via llvm-commits
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Michael Maitland via llvm-commits
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Yonghong Song via Phabricator via llvm-commits
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Kirill Naumov via Phabricator via llvm-commits
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Matt Arsenault via llvm-commits
- [PATCH] D155140: [RISCV] Add isMoveReg to vmv1r/vmv2r/vmv4r/vmv8r.v.
Craig Topper via Phabricator via llvm-commits
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Craig Topper via Phabricator via llvm-commits
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Craig Topper via Phabricator via llvm-commits
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- [llvm] 2306f89 - [lit] Remove unreachable @ expansion code
Fangrui Song via llvm-commits
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Zhuojia Shen via Phabricator via llvm-commits
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- [llvm] 497953b - [ADT] Remove SFINAE constraint from llvm::iterator_range ctor for gcc-7
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Funan Zeng via Phabricator via llvm-commits
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Dave Green via Phabricator via llvm-commits
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Weining Lu via llvm-commits
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Lu Weining via Phabricator via llvm-commits
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- [llvm] 23c2175 - [LowerMatrixIntrinsics] Use poison instead of undef as placeholder [NFC]
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- [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152366: [LoopVectorize] Allow inner loop runtime checks to be hoisted above an outer loop
Paul Walker via Phabricator via llvm-commits
- [llvm] 08fd44b - [AArch64] Force streaming-compatible codegen when attributes are set.
Sander de Smalen via llvm-commits
- [llvm] b13f280 - [IR] Remove typed pointer handling from getGEPReturnType() (NFC)
Nikita Popov via llvm-commits
- [PATCH] D153808: [CodeGen] Extend ComplexDeinterleaving pass to recognise patterns using integer types
Igor Kirillov via Phabricator via llvm-commits
- [llvm] cdfdfe7 - AMDGPU: Add some additional rcp/rsq tests
Matt Arsenault via llvm-commits
- [llvm] 00f9c6f - ValueTracking: Add more tests for canonicalize class handling
Matt Arsenault via llvm-commits
- [llvm] f868c22 - ValueTracking: Fix computeKnownFPClass canonicalize handling
Matt Arsenault via llvm-commits
- [llvm] 4a81283 - AMDGPU: Generate and add fdiv tests
Matt Arsenault via llvm-commits
- [llvm] c28e09c - AMDGPU: Preserve flags in fdiv_fast lowering
Matt Arsenault via llvm-commits
- [llvm] eb5d798 - [InstCombine] Allow KnownBits to be propagated
Paulo Matos via llvm-commits
- [PATCH] D155579: [Windows] Avoid using FileIndex for unique IDs on network mounts
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D155218: [InstCombine] Optimize addition/subtraction operations of splats of vscale multiplied by a constant
Paul Walker via Phabricator via llvm-commits
- [PATCH] D155582: [DAG] More aggressively (extract_vector_elt (build_vector x, y), c) iff element is zero constant
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152205: WIP: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Matt Arsenault via Phabricator via llvm-commits
- [llvm] eadbc4b - [Constants] Use getGEPReturnType() (NFC)
Nikita Popov via llvm-commits
- [PATCH] D154138: [InstCombine] Add tests for folding `(icmp eq/ne (or x, C), x)` -> `(icmp eq/ne (and x, C), C)`; NFC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D155585: [IR] Deprecate opaque pointer compatibility APIs
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D155586: avoid sign-conversion-error in erase
Paul via Phabricator via llvm-commits
- [PATCH] D152793: [RISCV] Add MC layer support for Zicfisslp.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D155587: [AMDGPU][RFC] Update isLegalAddressingMode for GFX9 SMEM signed offsets
Jay Foad via Phabricator via llvm-commits
- [PATCH] D155588: [NFC][AMDGPULowerModuleLDSPass] Cleanup of getTableLookupKernelIndex
Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
- [PATCH] D155589: [NFC][AMDGPULowerModuleLDSPass] Use shorter APIs in markUsedByKernel
Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
- [PATCH] D155590: [AMDGPU] Combine the SDAG and GISel versions of the fmed3.ll test.
Ivan Kosarev via Phabricator via llvm-commits
- [llvm] 26ff4c6 - [RISCV] Add SDNode patterns for vandn.[vv,vx]
Luke Lau via llvm-commits
- [llvm] 5eb7191 - [RISCV] Add VP patterns for vandn.[vv,vx]
Luke Lau via llvm-commits
- [llvm] b1d0bc0 - [AArch64] Fix an immediate out of range for large realignments on Windows
Martin Storsjö via llvm-commits
- [llvm] 46aec7b - [LoongArch][NFC] Revise instruction format to match lsx and lasx styles
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- [PATCH] D155592: [AArch64] Reuse larger DUPLANE if available
JinGu Kang via Phabricator via llvm-commits
- [llvm] 343e204 - [ARM] Replace TransferImpOps with copyImplicitOps
John Brawn via llvm-commits
- [llvm] 83ba148 - [SLP]Include cost of the reshuffling for same nodes with resizing.
Alexey Bataev via llvm-commits
- [PATCH] D155593: AMDGPU: Overhaul and improve rcp and rsq f32 formation
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 1768c45 - [MCA] Document behaviour of ResourceRef
Andrea Di Biagio via llvm-commits
- [PATCH] D155594: [InstCombine][NFC] Add tests for preserving !unreachable
Paweł Bylica via Phabricator via llvm-commits
- [PATCH] D32737: [Constants][SVE] Represent the runtime length of a scalable vector
Graham Hunter via Phabricator via llvm-commits
- [PATCH] D35307: [AArch64] Initial SVE register definitions
Graham Hunter via Phabricator via llvm-commits
- [PATCH] D155598: [libc++abi] Use std::abort() instead of std::terminate() on failure to allocate
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D155311: [AArch64][GISel] Additional FPTrunc vector lowering
Dave Green via Phabricator via llvm-commits
- [PATCH] D153907: [AIX] [TOC] Add -mtocdata/-mno-tocdata options on AIX
Alex Gatea via Phabricator via llvm-commits
- [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D155601: [AArch64][GISel] Additional FPExt vector lowering
Dave Green via Phabricator via llvm-commits
- [PATCH] D151283: [llvm-cov] Support a Hierarchical Structure for Coverage Report Generating
Gulfem Savrun Yeniceri via Phabricator via llvm-commits
- [PATCH] D150982: ValueTracking: Implement computeKnownFPClass for frexp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154802: [llvm][orc] Consider other ELF init sections as well
Jeff Niu via Phabricator via llvm-commits
- [llvm] 793a349 - Revert "[AArch64] Fix an immediate out of range for large realignments on Windows"
Martin Storsjö via llvm-commits
- [PATCH] D155604: [BOLT] Calculate input to output address map using BOLTLinker
Job Noorman via Phabricator via llvm-commits
- [PATCH] D154604: [BOLT] Calculate output values using BOLTLinker
Job Noorman via Phabricator via llvm-commits
- [PATCH] D155053: [AggressiveInstCombine] Fold strcmp for short string literals tests
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154725: [AggressiveInstCombine] Fold strcmp for short string literals
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D155612: [RISCV] Add test which shows alignment of constant pools and the functions which followed
Philip Reames via Phabricator via llvm-commits
- [PATCH] D154813: [ELF] Use llvm::xxh3_64bits for MergeInputSection::splitStrings
Piotr Zegar via Phabricator via llvm-commits
- [PATCH] D151283: [llvm-cov] Support directory layout in coverage reports
Yuhao Gu via Phabricator via llvm-commits
- [llvm] fe22b90 - [AArch64] Regenerate a couple of vector-shuffle tests. NFC
Dinar Temirbulatov via llvm-commits
- [PATCH] D155617: [WIP] GSoC 2023: Pass to annotate functions with appropriate optimization level.
Puneeth via Phabricator via llvm-commits
- [PATCH] D155618: [RISCV] Reduce alignment of vector constant pool entries
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152001: [RISCV][SLP] Inflate insert/extract costs on very small vectors
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152019: [RISCV][CostModel] Model vrgather.vv as being quadradic in LMUL
Philip Reames via Phabricator via llvm-commits
- [PATCH] D155620: [AMDGPU][AsmParser][NFC] Translate parsed DS instructions to MCInsts automatically.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152921: [lld] Synthesize metadata for MTE globals
Mitch Phillips via Phabricator via llvm-commits
- [llvm] b8bda50 - [Sparc] Regenerate float-constants.ll test checks
Simon Pilgrim via llvm-commits
- [llvm] 3ad4f92 - [DAG] More aggressively (extract_vector_elt (build_vector x, y), c) iff element is zero constant
Simon Pilgrim via llvm-commits
- [PATCH] D155071: [RISCV] Fold vmerge into its ops with smaller VL if known
Philip Reames via Phabricator via llvm-commits
- [llvm] 17508cb - [NFC] Fix builds on recent GCC with C++20 enabled
Alexander Batashev via llvm-commits
- [PATCH] D155101: [RISCV] Fold ops into vmv.v.v as vmerge with all-ones mask
Philip Reames via Phabricator via llvm-commits
- [PATCH] D154782: [NFC] Fix builds on recent GCC with C++20 enabled
Alexander Batashev via Phabricator via llvm-commits
- [llvm] 94f7600 - [AArch64] Add tests for merging LDRSWpre-LDR pairs
Zhuojia Shen via llvm-commits
- [llvm] b0093e1 - [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre
Zhuojia Shen via llvm-commits
- [llvm] 7767297 - [RISCV] Test for D155140. NFC
Craig Topper via llvm-commits
- [llvm] cdee88a - [RISCV] Add isMoveReg to vmv1r/vmv2r/vmv4r/vmv8r.v.
Craig Topper via llvm-commits
- [llvm] 9983d27 - [gn build] Manually port 2c651184
Arthur Eubanks via llvm-commits
- [PATCH] D155622: [X86] Recognize standalone `(1 << nbits) - 1` pattern as bzhi
Danila Malyutin via Phabricator via llvm-commits
- [llvm] eb89bf8 - [RISCV] Do not use FPR registers for fastcc if zfh/f/d is not specified in the architecture
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- [llvm] ca72457 - [RISCV] Add test coverage for peephole vmerge optimization of unmasked rvv instruction with a rounding mode (NFC)
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- [PATCH] D155623: [AArch64][NFC] Expand SLEEF coverage for ReplaceWithVeclib testing
Jolanta Jensen via Phabricator via llvm-commits
- [llvm] 0c05528 - [RISCV] Use RISCVISD::CZERO_EQZ/CZERO_NEZ for XVentanaCondOps.
Craig Topper via llvm-commits
- [PATCH] D155626: [DAG][AArch64] Fix truncated vscale constant types
Dave Green via Phabricator via llvm-commits
- [llvm] 3336836 - [Docs][llvm-exegesis] Add documentation for memory annotations
Aiden Grossman via llvm-commits
- [PATCH] D151039: [Docs][llvm-exegesis] Add documentation for memory
Aiden Grossman via Phabricator via llvm-commits
- [llvm] d7eb924 - [DAG] SimplifyDemandedBits - attempt to use SimplifyMultipleUseDemandedBits for bitcasts from larger element types
Simon Pilgrim via llvm-commits
- [llvm] ea3683e - [RISCV] Improve type promotion for i32 clmulr/clmulh on RV64.
Craig Topper via llvm-commits
- [llvm] f3dfcc5 - [llvm-exegesis] Support older kernel versions in subprocess executor
Aiden Grossman via llvm-commits
- [llvm] 74c0bdf - [AArch64][GISel] Additional FPTrunc vector lowering
David Green via llvm-commits
- [llvm] f7f744a - [CodeGen] Separate MachineFunctionSplitter logic for different profile types.
Han Shen via llvm-commits
- [PATCH] D155628: [OpenMP][OpenMPIRBuilder] Make outlined function parameters i64
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D71741: Add size of FP environment to DataLayout
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D149759: [symbolizer] Support symbol lookup
Serge Pavlov via Phabricator via llvm-commits
- [llvm] 7cc6b80 - [RISCV][CostModel] Model vrgather.vv as being quadradic in LMUL
Philip Reames via llvm-commits
- [compiler-rt] 0365ccd - [HWASAN][LSAN] Fix false positive memory leak reports on X86_64
Kirill Stoimenov via llvm-commits
- [PATCH] D133103: [PowerPC] Improve kill flag computation and add verification after MI peephole
Stefan Pintilie via Phabricator via llvm-commits
- [llvm] 8e02428 - [RISCV] Minor style cleanups in post ISEL combines
Philip Reames via llvm-commits
- [PATCH] D153358: [RISCV] Fold vmv.v.v across different subregister classes
Philip Reames via Phabricator via llvm-commits
- [llvm] 8e64821 - [RISCV] Remove unnecessary _32 and _64 suffixes from some scalar crypto builtins.
Craig Topper via llvm-commits
- [PATCH] D155632: Preserve important metadata in JumpThreadingPass::unfoldSelectInstr
Mark Mendell via Phabricator via llvm-commits
- [PATCH] D155633: [OpenMP][OpenMPIRBuilder] Add kernel launch codegen to emitTargetCall
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D155634: [RISCV] Remove unused class VPseudoTernary
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D155634: [RISCV] Remove unused classes VPseudoTernary and VPseudoTernaryNoMaskNoPolicy
Michael Maitland via Phabricator via llvm-commits
- [llvm] 4bbf371 - [SLP][NFC]Improve compile-time by using map {TreeEntry *, Instruction *}
Alexey Bataev via llvm-commits
- [llvm] 48e93f5 - [Support] Add llvm::xxh3_64bits
Fangrui Song via llvm-commits
- [PATCH] D155638: [llvm-reduce] Reduce function calling convention
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D155639: [RISCV][GlobalISel] Test legalization of binary logical instructions with wider types
Nitin John Raj via Phabricator via llvm-commits
- [compiler-rt] 902c41f - [scudo] Fix memtag tests.
Christopher Ferris via llvm-commits
- [llvm] 6fa66ac - [AArch64] NFC. Add a test exposing a bug in FixupStatepointCallerSaved pass
Daniil Suchkov via llvm-commits
- [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D155514: [BOLT] Switch to using layout order in YAML
Maksim Panchenko via Phabricator via llvm-commits
- [llvm] 85a68c3 - Revert "[ADT] fix filter_iterator_impl::operator++"
David Blaikie via llvm-commits
- [llvm] 1c36226 - Reland: "[ADT] fix filter_iterator_impl::operator++"
David Blaikie via llvm-commits
- [PATCH] D155646: [AMDGPU] Use AV regclass in wwm-reg spill pseudos for gfx908+
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D155652: AMDGPU: Fold fsub [+-0] into fneg when folding source modifiers
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D155657: [BOLT][Utils] Pass cmp-rev to nfc-check-setup
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D151449: [RISCV] Add DAG combine for CTTZ/CTLZ in the case of input 0
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154638: Emit a .debug_addr section with dsymutil
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Di Mo via Phabricator via llvm-commits
- [PATCH] D155634: [RISCV] Remove unused classes VPseudoTernary, VPseudoTernaryNoMaskNoPolicy, and VPseudoConversionW_V
Craig Topper via Phabricator via llvm-commits
- [PATCH] D155507: [RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers available
Craig Topper via Phabricator via llvm-commits
- [lld] ab9b3c8 - [lld] A Unified LTO Bitcode Frontend
Matthew Voss via llvm-commits
- [PATCH] D123805: [lld] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D143756: [AMDGPU] Use buildCopy and isCopy helper functions (NFC).
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143757: [AMDGPU] Enable predicated copy right from instruction selection
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143752: [MachineInstr] Use isCopy helper function (NFC).
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143753: [MachineInstr] Introduce TII buildCopy helper functions (NFC).
Christudasan Devadasan via Phabricator via llvm-commits
- [llvm] be6380f - [RISCV] Remove unused classes VPseudoTernary, VPseudoTernaryNoMaskNoPolicy, and VPseudoConversionW_V
Michael Maitland via llvm-commits
- [llvm] b22308b - [RISCV] Simplify VROR_IV_V_X_I multiclass. NFC
Craig Topper via llvm-commits
- [llvm] 621d1d0 - [cmake] Add -Wcast-qual to C flags if LLVM_ENABLE_WARNINGS is defined.
David Blaikie via llvm-commits
- [PATCH] D153911: [cmake] Add -Wcast-qual to C flags if LLVM_ENABLE_WARNINGS is defined.
David Blaikie via Phabricator via llvm-commits
- [PATCH] D154737: [BOLT] Add stale-related logging
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D155662: [X86] Promote VAES implied feature to AVX2
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D155353: [llvm-readobj] Print <null> for relocation target with an empty name
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D155663: [RISCV] Add Zbs instructions to SiFive7 SchedModel
Michael Maitland via Phabricator via llvm-commits
- [lld] f4b4bc2 - [ELF] --icf: switch to xxh3_64bits
Fangrui Song via llvm-commits
- [llvm] ca91d4e - [gn] port 3f65f718332c
Nico Weber via llvm-commits
- [llvm] b917bf0 - [gn] port 20341c3ad6f64a
Nico Weber via llvm-commits
- [llvm] c1e1147 - [gn build] Port ef70fe4d264d
LLVM GN Syncbot via llvm-commits
- [PATCH] D155666: Do not emit a .debug_addr section if the DW_AT_addr_base is not set.
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D155668: [RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.
Craig Topper via Phabricator via llvm-commits
- [llvm] ecbc812 - [NFC][XCOFF] Use common function to calculate file offset
Jake Egan via llvm-commits
- [PATCH] D155669: [RISCV] Remove zvk uimm constraints
Brandon Wu via Phabricator via llvm-commits
- [llvm] 32c257d - [RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers available
via llvm-commits
- [PATCH] D154415: [LV] Change the test cases to ensure that the trip count is not zero. (NFC)
Mel Chen via Phabricator via llvm-commits
- [llvm] f27017a - [LoongArch] Align functions and loops better according to uarch
Weining Lu via llvm-commits
- [llvm] d2884a2 - [NFC][XCOFF] Remove curly braces from single line if statement
Jake Egan via llvm-commits
- [llvm] eb33db4 - [AVR] Enable verifyInstructionPredicates for AVR
Jianjian GUAN via llvm-commits
- [PATCH] D155570: [AVR] Enable verifyInstructionPredicates for AVR
Jianjian Guan via Phabricator via llvm-commits
- [llvm] 4e83175 - [AVR] Expand shifts of all types except int8 and int16
Ben Shi via llvm-commits
- [PATCH] D154785: [AVR] Expand shifts of all types except int8 and int16
Ben Shi via Phabricator via llvm-commits
- [llvm] c4eb880 - Revert "[LoongArch] Change 'using namespace llvm;' to 'namespace llvm {' in LoongArchTargetParser.cpp. NFC"
Weining Lu via llvm-commits
- [llvm] 1d133d9 - [Demangle] Include <exception> for IWYU
Fangrui Song via llvm-commits
- [compiler-rt] 307e197 - [test] Make fuzzer/value-profile-div.test x86 specific
Fangrui Song via llvm-commits
- [PATCH] D152998: [TableGen] Support named arguments
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D155672: [JITLink][PowerPC] Correct handling of R_PPC64_REL24_NOTOC
Kai Luo via Phabricator via llvm-commits
- [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D155673: [RISCV] Replace zihintntl with zicond in ISAInfo unittest
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D155674: [RISCV] Update zihintntl to 1p0
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D153936: [LV] Add tests for select-cmp reduction pattern. (NFC)
Mel Chen via Phabricator via llvm-commits
- [llvm] c2cabe4 - [examples] Fix -Wcast-qual in OrcV2Examples after D153911 (NFC)
Jie Fu via llvm-commits
- [PATCH] D155675: [DWARFLinkerParallel] Switch to xxh3_64bits
Fangrui Song via Phabricator via llvm-commits
- [llvm] 7ee94d7 - [RISCV] Make SubtargetFeature description strings consistent with AssemblerPredicate.
Craig Topper via llvm-commits
- [PATCH] D155677: [lld-macho] Switch to xxh3_64bits
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D151547: [RISCV] Remove experimental for zihintntl.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D155306: [mlir][ArmSME] Add tile load op and extend tile store tile size support
Andrzej Warzynski via Phabricator via llvm-commits
- [llvm] 8606cbf - [IR] Remove Type::getPointerElementType() (NFC)
Nikita Popov via llvm-commits
- [llvm] fcbafc0 - [NFC][AMDGPULowerModuleLDSPass] Cleanup of getTableLookupKernelIndex
Juan Manuel MARTINEZ CAAMAÑO via llvm-commits
- [llvm] 4e43ba2 - [NFC][AMDGPULowerModuleLDSPass] Use shorter APIs in markUsedByKernel
Juan Manuel MARTINEZ CAAMAÑO via llvm-commits
- [PATCH] D154939: [TableGen] Deprecate old GI Combiner Emitter
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable
Mel Chen via Phabricator via llvm-commits
- [llvm] cb11f97 - [X86] Add PBNDKB instruction.
Freddy Ye via llvm-commits
- [PATCH] D155142: [X86] Add PBNDKB instruction.
Freddy, Ye via Phabricator via llvm-commits
- [llvm] 20b7584 - Reland [AArch64] Fix an immediate out of range for large realignments on Windows
Martin Storsjö via llvm-commits
- [llvm] 2ea5aa1 - [IR] Deprecate opaque pointer compatibility APIs
Nikita Popov via llvm-commits
- [PATCH] D154205: [MachineLICM] Handle subloops
Nikita Popov via Phabricator via llvm-commits
- [compiler-rt] 9f4dfcb - [CMake] Clean up old code for handling MSVC runtime setting the old way
Martin Storsjö via llvm-commits
- [PATCH] D153762: [LoopPeel] Clear dispositions after peeling
Nikita Popov via Phabricator via llvm-commits
- [llvm] 4389f9b - [AMDGPU] Regenerate is.fpclass checks
Jay Foad via llvm-commits
- [PATCH] D155350: [ValueTracking] Support vscale assumes for isKnownToBeAPowerOfTwo
David Spickett via Phabricator via llvm-commits
- [PATCH] D155681: [AMDGPU] Insert s_nop before s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D155683: [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp
Jianjian Guan via Phabricator via llvm-commits
- [llvm] a670505 - [LoopPeel] Clear dispositions after peeling
Nikita Popov via llvm-commits
- [PATCH] D155684: [XCOFF] Write source language ID and CPU version ID into C_FILE symbol.
Esme Yi via Phabricator via llvm-commits
- [llvm] 5bc8364 - [X86] LowerEXTEND_VECTOR_INREG - add sign_extend_vector_inreg fast path for all-signbits source values
Simon Pilgrim via llvm-commits
- [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.
witstorm via Phabricator via llvm-commits
- [PATCH] D155685: [libunwind] Fix build error on 32 bit Arm after -Wcast-qual was added
David Spickett via Phabricator via llvm-commits
- [PATCH] D155686: [bazel] remove PythonAttr TD after 67a910bbff772ebf4c47e8b434b59cdc4820bb68
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- [llvm] d76d5c7 - [RISCV] Sink more common code from RVInst/RVInst16 into RVInstCommon. NFC
Craig Topper via llvm-commits
- [llvm] 9324e1b - [InstCombineVectorOps] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [llvm] aa84326 - [TableGen][NFC] Remove unreachable code
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- [PATCH] D155789: [Support] Implement LLVM_ENABLE_REVERSE_ITERATION for StringMap
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D155790: PreISelIntrinsicLowering: don't expand memcpys in minsize functions, even with no-builtins.
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D149162: [Clang][OpenMP][IRBuilder] Move registerTargetGlobalVariable & getAddrOfDeclareTargetVar into the OMPIRBuilder
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153757: [RFC][TableGen][GlobalISel] Add Combiner Match Table Backend
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D155791: [RISCV] Remove unused Opcode field from RVInst16. NFC
Craig Topper via Phabricator via llvm-commits
- [llvm] 7cbcc59 - [llvm-readobj][test] Pre-commit an empty symbol name test for D155353
Fangrui Song via llvm-commits
- [lld] 82b4368 - [llvm-readobj] Print <null> for relocation target with an empty name
Fangrui Song via llvm-commits
- [PATCH] D155357: [RISCV] Allow delayed decision for ADD/SUB relocations
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D155792: [Statepoint] Use correct RegisterClass for spilling
Danila Malyutin via Phabricator via llvm-commits
- [PATCH] D155793: [Support] Avoid wait4 on Fuchsia
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D155794: [OpenMP][OpenMPIRBuilder] Migrate setPropertyExecutionMode() from Clang to OpenMPIRBuilder.
Raghu via Phabricator via llvm-commits
- [PATCH] D155796: [polly] CYGWIN: fix build error about PIC code.
Carlo Bramini via Phabricator via llvm-commits
- [PATCH] D155797: [RISCV] Remove Opcode field from RVInst. Assign Inst{6-0} directly. NFC
Craig Topper via Phabricator via llvm-commits
- [llvm] 91ccbc6 - [TableGen] Support named arguments
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- [llvm] 8b655e1 - [TableGen][CodeEmitterGen] Add support for querying operand bit offsets
Ilya Leoshkevich via llvm-commits
- [llvm] 0c41c59 - [DAG][AArch64] Fix truncated vscale constant types
David Green via llvm-commits
- [PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D154064: [InstructionSimplify] Limit threadCmpOverPHI recursion depth to 1
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation
Graham Hunter via Phabricator via llvm-commits
- [PATCH] D155801: [TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f
mgabka via Phabricator via llvm-commits
- [llvm] ff3b624 - [gn build] Port 049d6a3f428e
LLVM GN Syncbot via llvm-commits
- [llvm] c49f2f3 - [gn build] Port 1c154bd75515
LLVM GN Syncbot via llvm-commits
- [PATCH] D155804: [LV] Cache call vectorization decisions
Graham Hunter via Phabricator via llvm-commits
- [PATCH] D154067: [NFC][RISCV] Rewrite TableGen files using named arguments
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D155805: [TableGen][CodeEmitterGen] Emit a default label for getOperandBitOffset()'s OpNum switch
Ilya Leoshkevich via Phabricator via llvm-commits
- [llvm] 69fc6bf - [NFC][RISCV] Rewrite TableGen files using named arguments
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- [PATCH] D139267: Supporting tbaa.struct metadata generation for bitfields
Timo Stripf via Phabricator via llvm-commits
- [llvm] 2e0bf67 - [LV][AArch64] Fix reductions costs in strict-fadd-cost.ll. NFC
David Green via llvm-commits
- [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.
Alexandros Lamprineas via Phabricator via llvm-commits
- [llvm] f1cc791 - [X86] Add test case showing incorrect and(sextinreg(v0,i2),sextinreg(v1,i5)) -> sextinreg(and(v0,v1),i2) fold
Simon Pilgrim via llvm-commits
- [llvm] 697f605 - [DAG] hoistLogicOpWithSameOpcodeHands - ensure SIGN_EXTEND_INREG nodes have the same extension value type
Simon Pilgrim via llvm-commits
- [PATCH] D155806: [AArch64] Basic vector bswap costs
Dave Green via Phabricator via llvm-commits
- [PATCH] D155811: MachineSink: Fix strict weak ordering in GetAllSortedSuccessors
Danila Kutenin via Phabricator via llvm-commits
- [llvm] 7567b72 - [DAG] ShrinkDemandedConstant - early-out for empty DemandedBits/Elts
Simon Pilgrim via llvm-commits
- [PATCH] D155805: [TableGen][CodeEmitterGen] Avoid empty OpNum switches in getOperandBitOffset()
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] c05eff2 - [TableGen][CodeEmitterGen] Avoid empty OpNum switches in getOperandBitOffset()
Ilya Leoshkevich via llvm-commits
- [llvm] 9d138ba - [GIsel][AArch64] extend legalization of G_INSERT_VECTOR_ELT
Thorsten Schütt via llvm-commits
- [PATCH] D155815: [RISCV] Remove VPatBinaryExtVL_WV_WX multiclass. NFC
Luke Lau via Phabricator via llvm-commits
- [llvm] dbb6195 - [gn build] Port a2160dd34d56
LLVM GN Syncbot via llvm-commits
- [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types
Vladislav Dzhidzhoev via Phabricator via llvm-commits
- [llvm] cdab611 - [InstCombine] Avoid ConstantExpr::getAnd() (NFCI)
Nikita Popov via llvm-commits
- [PATCH] D155821: [TableGen][GlobalISel] Guarantee stable iteration order for stop-after-parse
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D155824: [LoongArch] Support -march=native and -mtune=
Lu Weining via Phabricator via llvm-commits
- [PATCH] D152282: [Transforms][LICM] A test case for the upcoming fix D152281 for the issue with reassociation profitability
Paul Osmialowski via Phabricator via llvm-commits
- [PATCH] D155828: [llvm-exegesis] Guard `__builtin_thread_pointer` behind a configure check
Markus Böck via Phabricator via llvm-commits
- [llvm] 48a749e - [RISCV] Don't include X1 in the X0_PD register pair
Alex Bradbury via llvm-commits
- [llvm] 4a8cc73 - [LoongArch] Fix instruction definitions that were incorrectly specified input/output operands
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- [llvm] b846f43 - [ConstantFolding] Update failure behavior documentation (NFC)
Nikita Popov via llvm-commits
- [llvm] 781beb3 - [LVI] Check ConstantFoldCompareInstOperands() failure (NFCI)
Nikita Popov via llvm-commits
- [PATCH] D155829: [LoongArch] Add LSX intrinsic support
wanglei via Phabricator via llvm-commits
- [llvm] 4f578e9 - [AArch64] Update bswap cost test. NFC
David Green via llvm-commits
- [PATCH] D155830: [LoongArch] Add LASX intrinsic support
wanglei via Phabricator via llvm-commits
- [llvm] cc77da5 - [X86] LowerTRUNCATE - use LowerTruncateVecPackWithSignBits for prefer-256 bit AVX512 cases during type legalization
Simon Pilgrim via llvm-commits
- [PATCH] D155831: [LV][WIP] Lazy creation of BFI when required by cost model
Evgeniy via Phabricator via llvm-commits
- [llvm] e1aa4e7 - [Statepoint] Use correct RegisterClass for spilling
Danila Malyutin via llvm-commits
- [PATCH] D154899: [SystemZ] Allow symbols in immediate asm operands
Ilya Leoshkevich via Phabricator via llvm-commits
- [llvm] 60152f1 - [RISCV][NFC] Use templated getSubtarget in RISCVExpandPseudo::runOnMachineFunction
Alex Bradbury via llvm-commits
- [PATCH] D155836: [WIP][RISCV] Verify whether a piece of assemblies leak secret
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] 632594f - [InstCombine] Avoid ConstantExpr::get()
Nikita Popov via llvm-commits
- [llvm] f8a36d8 - [IR] Mark add constant expressions as undesirable
Nikita Popov via llvm-commits
- [llvm] cde5e42 - [RISCV][NFC] Get rid of additional unneeded static_cast around RISCVSubtarget
Alex Bradbury via llvm-commits
- [llvm] 311abf5 - Implement -frecord-command-line for XCOFF integrated assembler path
Jake Egan via llvm-commits
- [PATCH] D154921: Implement -frecord-command-line for XCOFF integrated assembler path
Jake Egan via Phabricator via llvm-commits
- [PATCH] D147114: [LV] Use BFI to adjust cost of predicated instructions
Evgeniy via Phabricator via llvm-commits
- [PATCH] D155840: [RISCV][NFC] Add RISCVSubtarget field to RISCVExpandPseudo and RISCVPreRAExpandPseudo
Alex Bradbury via Phabricator via llvm-commits
- [llvm] 3ba3ea3 - [IVUsers] Check getExpr result in findAddRecForLoop.
Florian Hahn via llvm-commits
- [PATCH] D155484: [AArch64] Global Isel Funnel Shift Lowering
Dave Green via Phabricator via llvm-commits
- [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca
Pierre van Houtryve via Phabricator via llvm-commits
- [llvm] 40340cf - [MLIR][OpenMP][OMPIRBuilder] Use target triple to initialize `IsGPU` flag
Sergio Afonso via llvm-commits
- [PATCH] D146845: [FPEnv] [WIP] Verify strictfp attribute correctness, first part, 2023 edition
Kevin P. Neal via Phabricator via llvm-commits
- [llvm] 95c2d01 - [FPEnv][RISCV] Correct strictfp tests.
Kevin P. Neal via llvm-commits
- [PATCH] D155843: [Analysis] Analysis of storing unchanged loaded value
Aleksei Romanov via Phabricator via llvm-commits
- [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D155288: [RISCV] Add a new select combine for when the condition is a setcc that will be inverted
Alex Bradbury via Phabricator via llvm-commits
- [llvm] 8bad7ad - [AArch64] Reuse larger DUPLANE if available
Jingu Kang via llvm-commits
- [llvm] 8dacf55 - [RISCV] Order the RISCVInstrInfo*.td includes for standard extensions into logical groups. NFC
Craig Topper via llvm-commits
- [llvm] 09174c0 - [RISCV] Remove unused Opcode field from RVInst16. NFC
Craig Topper via llvm-commits
- [llvm] 24bb36e - [RISCV] Remove Opcode field from RVInst. Assign Inst{6-0} directly. NFC
Craig Topper via llvm-commits
- [llvm] cce5324 - [ConstraintElim] Store the triple Pred + LHS + RHS in ReproducerEntry instead of CmpInst + Not
Yingwei Zheng via llvm-commits
- [PATCH] D155851: [llvm][nvptx] Add sm_90a
guray ozen via Phabricator via llvm-commits
- [llvm] 50dd383 - [MachineLICM] Handle Subloops
Jingu Kang via llvm-commits
- [PATCH] D155853: [ConstraintElim] Add test cases from PR63896. NFC.
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D155854: [AMDGPU] Add tests for SMEM addressing modes in CodeGenPrepare
Jay Foad via Phabricator via llvm-commits
- [llvm] 9dc391e - Revert "[IR] Mark add constant expressions as undesirable"
Nikita Popov via llvm-commits
- [PATCH] D155856: [LLVM][Opt][RFC] Add LLVM support for C++ Parallel Algorithm Offload
Alex Voicu via Phabricator via llvm-commits
- [PATCH] D124196: [AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D155860: [mlir][bazel] Fix missing dependency in TransformOpsPyFiles.
Ingo Müller via Phabricator via llvm-commits
- [PATCH] D155862: The powerpcspe 64-bit load/store requires 8-bit offest unlike otherload and store instructions which has 16-bit offset. So if stack size isany larger than that we need extra spill slot for emergency spilling.
Kishan Parmar via Phabricator via llvm-commits
- [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32
Bing Yu via Phabricator via llvm-commits
- [llvm] 962a6fe - [test][llvm-reduce] Remove implicit-check-not in reduce-linkage.ll
Arthur Eubanks via llvm-commits
- [PATCH] D155864: [AMDGPU] Allow 8,16 bit sources in calculateSrcByte
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D155865: [AMDGPU][GlobalIsel] Fix legalizer for G_ABS for odd sized vectors
Acim Maravic via Phabricator via llvm-commits
- [PATCH] D155867: [AMDGPU][GlobalISel] Fix applyMappingImpl function for G_ABS and type v2s16
Acim Maravic via Phabricator via llvm-commits
- [PATCH] D155868: [AMDGPU] Add patterns for v_dot*_IU for GFX11
Jeffrey Byrnes via Phabricator via llvm-commits
- [lld] a3622ac - [wasm-ld] Switch to xxh3_64bits
Fangrui Song via llvm-commits
- [PATCH] D155871: [AArch64] Lower fcvtl2 (fpext) via tablegen patterns.
Dave Green via Phabricator via llvm-commits
- [PATCH] D155872: [AArch64] Add vselect(fmin/fmax) SVE patterns
Dave Green via Phabricator via llvm-commits
- [PATCH] D155874: [llvm] Exit early if inputs to comparator are equal
David Berard via Phabricator via llvm-commits
- [PATCH] D155857: [clang] fix nonnull warnings during build
Farid Zakaria via Phabricator via llvm-commits
- [PATCH] D153829: [AArch64] Move branch relaxation after bbsection assignment
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D155763: [BOLT][DWARF] Fix performance regression running BOLT on binaries build with DWARF4
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D155876: [PowerPC] vector cost model add cost to extract i1
Roland Froese via Phabricator via llvm-commits
- [llvm] c9fd7ac - [InstCombine] Introduce tests for D153963
Antonio Frighetto via llvm-commits
- [llvm] f12a556 - [InstCombine] Fold binop of `select` and cast of `select` condition
Antonio Frighetto via llvm-commits
- [compiler-rt] 760c208 - [Sanitizers][Darwin][Test] XFAIL symbolize_pc test on Darwin/TSan+UBSan
Mariusz Borsa via llvm-commits
- [PATCH] D155881: [AMDGPU] Remove std::optional from VOPD::ComponentProps. NFC.
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D150771: [RISCV] Set Fast flag for unaligned scalar memory accesses
Philip Reames via Phabricator via llvm-commits
- [llvm] eb3f2fe - [RISCV] Revise check names for unaligned memory op tests [nfc]
Philip Reames via llvm-commits
- [llvm] 2f34288 - Revert "[gold] Add preliminary FatLTO support to the Gold plugin"
Paul Kirth via llvm-commits
- [PATCH] D155884: [Attributor][AMDGPU] Improve indirect call support in closed modules
Johannes Doerfert via Phabricator via llvm-commits
- [compiler-rt] af41f79 - [scudo] Clean up tests.
Christopher Ferris via llvm-commits
- [PATCH] D155212: [nfc] small maintainability IndirectCallPromotion changes
Rong Xu via Phabricator via llvm-commits
- [llvm] 96c973d - [nfc] small maintainability IndirectCallPromotion changes
Mircea Trofin via llvm-commits
- [llvm] 14c55e6 - [unittest] Improve OpenMPIRBuilderTest after D149162
Fangrui Song via llvm-commits
- [PATCH] D155888: [nfc] Renamed ICallPromotionFunc to InidrectCallPromoter
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D155889: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D155891: AMDGPU: Filter out contract flags when lowering exp
Matt Arsenault via Phabricator via llvm-commits
- [llvm] f07e87d - [gn build] Port 37e5baf318b1
LLVM GN Syncbot via llvm-commits
- [PATCH] D155894: BPF: fail reports a fatal error
Tamir Duberstein via Phabricator via llvm-commits
- [llvm] 34c01a6 - [RISCV] Add memset.inline test coverage with and without V [nfc]
Philip Reames via llvm-commits
- [llvm] 9ef82be - [nfc] Renamed ICallPromotionFunc to InidrectCallPromoter
Mircea Trofin via llvm-commits
- [llvm] 076bc37 - AMDGPU: Add some new baseline tests for exp lowering
Matt Arsenault via llvm-commits
- [llvm] 0295513 - AMDGPU: Filter out contract flags when lowering exp
Matt Arsenault via llvm-commits
- [PATCH] D155896: [Target][MC} Cleaning up AssemblerDialect / InstructionPrinterSyntaxVariant
Christoph Stiller via Phabricator via llvm-commits
- [llvm] ca34f1b - AMDGPU: Add baseline test for folding fsub into fneg modifiers
Matt Arsenault via llvm-commits
- [PATCH] D155900: [TTI][NFCI] Introduce two new target transform hooks
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D153587: [GlobPattern] Support brace expansions
Ellis Hoag via Phabricator via llvm-commits
- [llvm] 881e9f2 - AMDGPU: Regenerate test checks
Matt Arsenault via llvm-commits
- [llvm] fb54afd - AMDGPU: Fold fsub [+-0] into fneg when folding source modifiers
Matt Arsenault via llvm-commits
- [llvm] 3cca461 - [gn build] Port 49b3c3355f9c
LLVM GN Syncbot via llvm-commits
- [llvm] b2d58b5 - AMDGPU: Expand rsq testing to cover contract flag
Matt Arsenault via llvm-commits
- [llvm] d33ab05 - AMDGPU: Add flag to disable fdiv processing in IR pass
Matt Arsenault via llvm-commits
- [PATCH] D155874: [llvm][SLP] Exit early if inputs to comparator are equal
David Berard via Phabricator via llvm-commits
- [llvm] 4f057f5 - [RISCV] Expand memset.inline test coverage [nfc]
Philip Reames via llvm-commits
- [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D154014: [SpecialCaseList] Use Globs instead of Regex
Ellis Hoag via Phabricator via llvm-commits
- [PATCH] D155908: [RISCV] Use original mask for restoring the original sign instead of from setcc
Jim Lin via Phabricator via llvm-commits
- [llvm] 4c2980c - [llvm-profdata] Stabilize iteration order for InstrProfWriter
Fangrui Song via llvm-commits
- [PATCH] D155896: [Target][MC] Cleaning up AssemblerDialect / InstructionPrinterSyntaxVariant
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D155767: [BOLT] Improve Linux Kernel ORC reader
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154931: [LoongArch] Support InlineAsm for LSX and LASX
Lu Weining via Phabricator via llvm-commits
- [llvm] b8580ef - [llvm][utils] Use literal type name for non-template data formatters (NFC)
Dave Lee via llvm-commits
- [llvm] a70aa5e - [RISCV] precommit for removing useless copy from undef subreg
Piyou Chen via llvm-commits
- [PATCH] D155039: [RISCV] precommit for removing useless copy from undef subreg
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D155910: [RISCV] Support register allocation for GHC when f/d is not specified in the architecture
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152693: LoopVectorize: introduce RecurKind::Induction(I|F)(Max|Min)
Shiva Chen via Phabricator via llvm-commits
- [PATCH] D155915: [NFC][DAGCombiner] Tests for future commit.
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D155916: [RISCV] Remove some instructions from Zvfbfwma by implying Zfbfmin according to the latest spec
Jun Sha via Phabricator via llvm-commits
- [llvm] ede20c1 - [gn build] Port c3648f37d0ed
LLVM GN Syncbot via llvm-commits
- [llvm] 822c31a - [llvm-exegesis] Guard `__builtin_thread_pointer` behind a configure check
Markus Böck via llvm-commits
- [PATCH] D155917: [LoongArch] Add definition for LVZ/LBT instructions
wanglei via Phabricator via llvm-commits
- [PATCH] D118020: [RISCV] Set CostPerUse for floating point registers
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D155918: [AVR] Simplify AVRSubtarget.
Jianjian Guan via Phabricator via llvm-commits
- [llvm] 8da62b8 - [AArch64] Basic vector bswap costs
David Green via llvm-commits
- [PATCH] D155834: [LoongArch] Add LSX intrinsic testcases
陈荔 via Phabricator via llvm-commits
- [PATCH] D155835: [LoongArch] Add LASX intrinsic testcases
陈荔 via Phabricator via llvm-commits
- [PATCH] D155422: [MemCpyOpt] precommit test for D155406 (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D154228: [GVN] Use vector ops when doing loadCoercion on a vector value
Manuel Brito via Phabricator via llvm-commits
- [llvm] 218f975 - [IR] Accept non-Instruction in BinaryOperator::CreateWithCopiedFlags() (NFC)
Nikita Popov via llvm-commits
- [PATCH] D155406: [MemCpyOpt] implement multi BB stack-move optimization
Kohei Asano via Phabricator via llvm-commits
- [llvm] 086ee99 - Reapply [IR] Mark and constant expressions as undesirable
Nikita Popov via llvm-commits
- [llvm] 2a11549 - [InstCombine] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] 174300a - [LoopIdiom] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] f060f09 - [X86] Expand constant expressions in test (NFC)
Nikita Popov via llvm-commits
- [PATCH] D155924: [IR] Remove support for and constant expressions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D155925: [JITLink][PowerPC][WIP] Change method to check if a symbol is external to current object
Kai Luo via Phabricator via llvm-commits
- [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.
Konstantina Mitropoulou via Phabricator via llvm-commits
- [llvm] a0eee6c - [SystemZ] Allow symbols in immediate asm operands
Ilya Leoshkevich via llvm-commits
- [llvm] 418e678 - [RISCV] Add tests for vnsr[l,a].wx patterns that could be matched
Luke Lau via llvm-commits
- [llvm] 24628a1 - [RISCV] Add patterns for vnsr[a,l].wx where shift amount has different type than vector element
Luke Lau via llvm-commits
- [llvm] f6bdfb0 - [RISCV] Remove VPatBinaryExtVL_WV_WX multiclass. NFC
Luke Lau via llvm-commits
- [PATCH] D155926: [JITLink][PowerPC][WIP] Add TLS support for ppc64
Kai Luo via Phabricator via llvm-commits
- [llvm] 33a83c5 - [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi]
Luke Lau via llvm-commits
- [PATCH] D155927: [RISCV] Add tests for vnsrl.vx where shift amount is truncated
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155928: [RISCV] Add patterns for vnsrl.vx where shift amount is truncated
Luke Lau via Phabricator via llvm-commits
- [PATCH] D155929: [RISCV] Use the first element of source as the start value of reduction.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D155932: [WIP][RISCV] Add subclasses of Sched to simplify code
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] d8e26bc - [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Shivam Gupta via llvm-commits
- [llvm] 787bef0 - [AMDGPU] Add tests for SMEM addressing modes in CodeGenPrepare
Jay Foad via llvm-commits
- [llvm] e45a0c2 - [AMDGPU][RFC] Update isLegalAddressingMode for GFX9 SMEM signed offsets
Jay Foad via llvm-commits
- [llvm] c41a62e - [AMDGPU] [NFC] Fixed a typo in SIShrinkInstructions.cpp
Pranav Taneja via llvm-commits
- [PATCH] D155103: [FuncSpec] Split the specialization bonus into CodeSize and Latency.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D155936: [RISCV] Add SDNode patterns for vwsll.[vv,vx,vi]
Luke Lau via Phabricator via llvm-commits
- [llvm] db04f01 - Revert "[LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case"
Shivam Gupta via llvm-commits
- [PATCH] D155939: [SimplifyCFG][NFC] Add tests for merging the combination of phis in switch
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D155943: [NFC] Update formatting of some symbolizer tests
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D153472: AMDGPU: Correctly expand f64 sqrt intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153394: [AArch64][GlobalISel] Legalize <2 x s16> and <4 x s8> for G_BUILD_VECTOR
Allen zhong via Phabricator via llvm-commits
- [PATCH] D155066: [libunwind] Unwind through aarch64/FreeBSD sigreturn frame
Ed Maste via Phabricator via llvm-commits
- [lld] 29112a9 - Mark this test as unsupported on Windows systems
Aaron Ballman via llvm-commits
- [PATCH] D155944: expose get/set tail call kind in the C api
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- [PATCH] D155948: [LV][WIP] dd-exit loops vectorization
Evgeniy via Phabricator via llvm-commits
- [llvm] 7196eb2 - [X86] packss.ll - add SSE4.2 test coverage
Simon Pilgrim via llvm-commits
- [llvm] c0a1f46 - [X86] Add packus.ll test coverage
Simon Pilgrim via llvm-commits
- [llvm] be62041 - [X86] matchBinaryShuffle - match PACKUS for v2i64 -> v4i32 shuffle truncation patterns.
Simon Pilgrim via llvm-commits
- [llvm] 8fa02db - [llvm][SLP] Exit early if inputs to comparator are equal
Alexey Bataev via llvm-commits
- [PATCH] D146303: [llvm-exegesis] Prevent llvm-exegesis from using unsupported opcodes
Pavel Kosov via Phabricator via llvm-commits
- [PATCH] D155952: [X86][BF16] Do not scalarize masked load for BF16 when we have BWI
Phoebe Wang via Phabricator via llvm-commits
- [llvm] 791c896 - [TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f
Maciej Gabka via llvm-commits
- [llvm] b172fbf - Revert "[TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f"
Maciej Gabka via llvm-commits
- [llvm] 98b1072 - [ValueTracking] Extract isKnownNonZeroFromOperator() (NFC)
Nikita Popov via llvm-commits
- [llvm] ae60706 - [DAG] SimplifyDemandedBits - call ComputeKnownBits for constant non-uniform ISD::SRL shift amounts
Simon Pilgrim via llvm-commits
- [PATCH] D131231: [LoongArch] Add codegen support for ISD::ROTL and ISD::ROTR
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D130252: [RISCV] Precommit test for D130251
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] 4f7e034 - [ValueTracking] Check non-zero operator before dominating condition (NFC)
Nikita Popov via llvm-commits
- [PATCH] D155953: [RISCV][MC] Add CLI option to disable branch relaxation
Job Noorman via Phabricator via llvm-commits
- [llvm] 38cdb00 - Add missing SLEEF mappings to scalable vector functions for log2 and log2f
Maciej Gabka via llvm-commits
- [PATCH] D154445: [Mips] Fix argument lowering for illegal vector types (PR63608)
Nikita Popov via Phabricator via llvm-commits
- [llvm] 4bb2234 - [FunctionAttrs] Add tests for PR63936 (NFC)
Nikita Popov via llvm-commits
- [llvm] 6c8f447 - [ARM] Extend regression test for D154281
Jay Foad via llvm-commits
- [PATCH] D155956: [FunctionAttrs] Consider recursive argmem effects (PR63936)
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- [PATCH] D155957: [PPC][AIX] Fix toc-data peephole bug and some related cleanup.
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- [PATCH] D155958: [NFC][ValueTracking]: Remove redundant computeKnownBits call for LoadInst in isKnownNonZero
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- [PATCH] D155960: [NaryReassociate] Use new access type aware getGEPCost
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- [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations
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- [PATCH] D155961: [X86][BF16] Customize INSERT_VECTOR_ELT for bf16 when feature BF16 is on
Phoebe Wang via Phabricator via llvm-commits
- [llvm] ca1c052 - [X86][BF16] Do not scalarize masked load for BF16 when we have BWI
Phoebe Wang via llvm-commits
- [llvm] fbae3d1 - Revert "[X86][BF16] Do not scalarize masked load for BF16 when we have BWI"
Phoebe Wang via llvm-commits
- [llvm] ffa829c - [RISCV] Allow delayed decision for ADD/SUB relocations
Fangrui Song via llvm-commits
- [PATCH] D155972: [SVE] Add vselect(mla/mls) patterns for cases where a multiplicand is used for the false lanes.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D155894: [BPF] Do not miscompile, allow external calls
Tamir Duberstein via Phabricator via llvm-commits
- [llvm] 9996e71 - [Support] Implement LLVM_ENABLE_REVERSE_ITERATION for StringMap
Fangrui Song via llvm-commits
- [llvm] b81b4cf - [RISCV][NFC] Add RISCVSubtarget field to RISCVExpandPseudo and RISCVPreRAExpandPseudo
Alex Bradbury via llvm-commits
- [PATCH] D154722: [AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)
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- [PATCH] D149587: InstSimplify: Simplifications for ldexp
Matt Arsenault via Phabricator via llvm-commits
- [compiler-rt] 7be84ba - [Sanitizers][Darwin][Test] Mark symbolize_pc test on Darwin/TSan+UBSan as UNSUPPORTED
Arthur Eubanks via llvm-commits
- [PATCH] D148654: Modify BoundsSan to improve debuggability
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- [PATCH] D154119: Fix: Distinguish CFI Metadata Checks in MergeFunctions Pass
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- [llvm] b95435a - [X86] Add isUpperSubvectorUndef helper to simplify recognition of vectors widened with undef upper subvectors. NFC.
Simon Pilgrim via llvm-commits
- [PATCH] D155623: [AArch64][NFC] Expand coverage of ReplaceWithVeclib testing using SLEEF vector library
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- [PATCH] D152834: A new code layout algorithm for function reordering [2/3]
Rahman Lavaee via Phabricator via llvm-commits
- [llvm] 237784d - [AMDGPU] Remove std::optional from VOPD::ComponentProps. NFC.
Stanislav Mekhanoshin via llvm-commits
- [llvm] c6c5aad - [X86] truncateVectorWithPACK - avoid concat_vectors(extract_subvector(pack()),extract_subvector(pack())) for sub-128 bit vectors
Simon Pilgrim via llvm-commits
- [llvm] 65c9153 - [X86] combineBitcastvxi1 - don't prematurely create PACKSS nodes.
Simon Pilgrim via llvm-commits
- [llvm] bf98aaa - [llvm-objdump] Use BBEntry::BBID to represent basic block numbers.
Rahman Lavaee via llvm-commits
- [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D150771: [RISCV] Set Fast flag for unaligned memory accesses
Philip Reames via Phabricator via llvm-commits
- [PATCH] D85917: [MSP430] Fix passing C structs and unions as function arguments
Matt Arsenault via Phabricator via llvm-commits
- [llvm] f21a042 - [InstCombine] Add tests for canonicalizing `(X^(X-1)) u{ge,lt} X` as pow2 test; NFC
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- [llvm] 142f744 - [InstCombine] Canonicalize `(X^(X-1)) u{ge, lt} X` as pow2 test
Noah Goldstein via llvm-commits
- [llvm] 5ca14d4 - [InstCombine] Add tests for ispow2 comparisons with a known bit; NFC
Noah Goldstein via llvm-commits
- [llvm] 413c119 - [InstCombine] If there is a known-bit transform is_pow2 check to just check for any other bits
Noah Goldstein via llvm-commits
- [PATCH] D155987: AMDGPU: Move placement of RemoveIncompatibleFunctions
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- [PATCH] D155988: Enable compact unwind in all darwin simulators
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- [PATCH] D139100: Add update_any_test_checks.py convenience utility
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- [llvm] 37512d7 - AMDGPU: Add baseline test for fdiv combine
Matt Arsenault via llvm-commits
- [llvm] 35f9fdb - ValueTracking: Add baseline tests for frexp handling in computeKnownFPClass
Matt Arsenault via llvm-commits
- [llvm] d873a14 - ValueTracking: Implement computeKnownFPClass for frexp
Matt Arsenault via llvm-commits
- [PATCH] D148216: [UTC] Add fallback support for specific metadata, and check their defs
Johannes Doerfert via Phabricator via llvm-commits
- [llvm] 25d3421 - [LV] Replace use of getMaxSafeDepDist with isSafeForAnyVector (NFC)
Florian Hahn via llvm-commits
- [PATCH] D155989: [LLD][ELF] Warn on invalid local symbols
Vincent Lee via Phabricator via llvm-commits
- [llvm] f2e8b38 - [SLP][NFC]Add a test with strided loads, NFC.
Alexey Bataev via llvm-commits
- [llvm] 0315fca - [AArch64] Move branch relaxation after bbsection assignment
Daniel Hoekwater via llvm-commits
- [llvm] 8287f3a - AMDGPU: Overhaul and improve rcp and rsq f32 formation
Matt Arsenault via llvm-commits
- [PATCH] D155993: [llvm-debuginfod] Switch to xxh3_64bits
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D145211: Relax cross-section branches
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D155995: [AMDGPU] WIP: Allow matching into v_dot4
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D96004: [AArch64] Stack probing for function prologues
Oskar Wirga via Phabricator via llvm-commits
- [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation
Teresa Johnson via Phabricator via llvm-commits
- [llvm] f4381d4 - [NVPTX] Add initial support for '.alias' in PTX
Joseph Huber via llvm-commits
- [PATCH] D155211: [NVPTX] Add initial support for '.alias' in PTX
Joseph Huber via Phabricator via llvm-commits
- [llvm] cbf2a6c - [RISCV] Add test which shows alignment of constant pools and the functions which followed
Philip Reames via llvm-commits
- [compiler-rt] 51e49e1 - [HWASAN][LSAN] Replace cstdint with stdint.h
Kirill Stoimenov via llvm-commits
- [PATCH] D156002: AMDGPU: Implement combineRepeatedFPDivisors
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 6699c37 - AMDGPU: Refactor AMDGPUCodeGenPrepare fdiv handling
Matt Arsenault via llvm-commits
- [llvm] 8406c35 - AMDGPU: Implement new 2ulp fdiv lowering
Matt Arsenault via llvm-commits
- [llvm] 6398b68 - AMDGPU: Fix variables only used in asserts
Matt Arsenault via llvm-commits
- [llvm] 17f4f26 - Revert "Reapply [IR] Mark and constant expressions as undesirable"
Nathan Chancellor via llvm-commits
- [llvm] 785939c - Revert "[RISCV] Add test which shows alignment of constant pools and the functions which followed"
Philip Reames via llvm-commits
- [PATCH] D156005: Use `getHashValue` in `SetVector::insert` and `SetVector::contains`
Evan Wilde via Phabricator via llvm-commits
- [llvm] 62a1fbe - Enable compact unwind in all darwin simulators
Jon Roelofs via llvm-commits
- [llvm] 03612b2 - [AMDGPU] Fix an unused variable warning
Kazu Hirata via llvm-commits
- [PATCH] D156006: [InstrProf] Emit warnings when correlating lightweight profiles
Ellis Hoag via Phabricator via llvm-commits
- [PATCH] D151796: [SCEV] Skip min/max expressions when normalizing/denormalizing SCEV expressions
Artur Pilipenko via Phabricator via llvm-commits
- [PATCH] D156012: [NVPTX] Fix lack of `.noreturn` on certain functions for aliases
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D156013: [BOLT] Fix jump table issue for fragmented functions
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [llvm] c9d419c - Revert "Reapply: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas"
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- [llvm] b55ac6e - [VirtualFileSystem] Make gcc<7.5 happy after 75d71800aa384ee58663d892c325572f5588df2a
Fangrui Song via llvm-commits
- [PATCH] D144936: [SPARC][IAS] Recognize more SPARCv9 instructions/pseudoinstructions
Koakuma via Phabricator via llvm-commits
- [llvm] c51c607 - [VirtualFileSystem] Use std::map::emplace
Fangrui Song via llvm-commits
- [PATCH] D156018: [BOLT] Impl createRelocation for AArch64
Jiapeng Zhou via Phabricator via llvm-commits
- [llvm] f11526b - [X86][BF16] Do not scalarize masked load for BF16 when we have AVX512BF16
Phoebe Wang via llvm-commits
- [PATCH] D155952: [X86][BF16] Do not scalarize masked load for BF16 when we have AVX512_BF16
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D71089: [AMDGPU] Optimizing unnecessary copies for REG_SEQUENCE PHI operand. Also fixes rocBLAS error
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 9f90669 - [SimplifyCFG] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [llvm] 9e1b681 - [CoroSplit] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [PATCH] D153394: [AArch64][GlobalISel] Legalize <2 x s8> and <4 x s8> for G_BUILD_VECTOR
Allen zhong via Phabricator via llvm-commits
- [llvm] 952fe94 - ConstantFolding: Fix canonicalize folding for dynamic mode denormal inputs
Matt Arsenault via llvm-commits
- [llvm] bd20307 - AMDGPU: Silence a gcc warning
Matt Arsenault via llvm-commits
- [PATCH] D156025: ConstantFolding: Constant fold denormal inputs to canonicalize for IEEE
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 04527f1 - [X86][BF16] Customize INSERT_VECTOR_ELT for bf16 when feature BF16 is on
Phoebe Wang via llvm-commits
- [llvm] 29d0b60 - [StructurizeCFG] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [llvm] 3bc74be - [Inline] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [llvm] f118ef6 - [gn] port 9996e71f2d (LLVM_ENABLE_REVERSE_ITERATION in llvm/test)
Nico Weber via llvm-commits
- [llvm] 365d6eb - [gn] port b0bb68fd3cb7bfba (LLVM_ENABLE_REVERSE_ITERATION in clang/test)
Nico Weber via llvm-commits
- [llvm] efcd4d4 - [gn] port 822c31a0fe827a6 (HAVE_BUILTIN_THREAD_POINTER)
Nico Weber via llvm-commits
- [llvm] 6617977 - [gn build] Port 57bd882343f8
LLVM GN Syncbot via llvm-commits
- [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2
Christoph Stiller via Phabricator via llvm-commits
- [PATCH] D156028: [InstCombine] icmp udiv transform tests
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D156029: [InstCombine] icmp udiv transform
Maksim Kita via Phabricator via llvm-commits
- [llvm] 8b4d733 - [X86] Enable ISD::TRUNCATE support from v2i64 and v4i64 nodes
Simon Pilgrim via llvm-commits
- [llvm] d878916 - [MemCpyOpt] add noalias metadata on lifetime intrinsic test case for stack-move optimization(NFC)
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- [lld] 8db61ed - [WebAssembly] Stabilize custom section order
Fangrui Song via llvm-commits
- [llvm] 8bba3f0 - [ORC] Stabilize output stream order
Fangrui Song via llvm-commits
- [llvm] af32e51 - [X86] LowerRotate - manually expand rotate by splat constant patterns.
Simon Pilgrim via llvm-commits
- [llvm] fe48801 - Emit a .debug_addr section with dsymutil
Shubham Sandeep Rastogi via llvm-commits
- [llvm] c5a45b2 - Do not emit a .debug_addr section if the DW_AT_addr_base is not set.
Shubham Sandeep Rastogi via llvm-commits
- [llvm] ab7874e - Change DW_LLE_baseaddr to DW_LLE_baseaddrx in .debug_loclist section
Shubham Sandeep Rastogi via llvm-commits
- [llvm] 90933c2 - [RISCV] Remove unnecessary opcode argument to FPUnaryOp_imm template. NFC
Craig Topper via llvm-commits
- [PATCH] D155384: [amdgpu][wip] Precise existing usage calculation in PromoteAllocaToLDS
Matt Arsenault via Phabricator via llvm-commits
- [llvm] a815f03 - [LegalizeTypes] Use report_fatal_error instead of llvm_unreachable in the default case of some type legalization handlers.
Craig Topper via llvm-commits
- [llvm] 33fad30 - [X86] Fix typo in comment. NFC
Craig Topper via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Florian Hahn via Phabricator via llvm-commits
- [llvm] fa2fb88 - Fix test failure on linaro-clang-armv8-quick with
Shubham Sandeep Rastogi via llvm-commits
- [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)
Christoph Stiller via Phabricator via llvm-commits
- [llvm] ac715f7 - [RISCV] Simplify setOperationAction for f64 ceil/floor/round/trunc/etc. NFC
Craig Topper via llvm-commits
- [PATCH] D156034: [LAA] Make MaxSafeDepDistBytes private in LoopAccessAnalysis
Michael Maitland via Phabricator via llvm-commits
- [llvm] 1844d64 - [RewriteStatepointsForGC] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [llvm] 9007d0e - [UnifyLoopExits] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [llvm] b396817 - [ObjCARC] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [compiler-rt] 2b0f5df - [builtins][Mips] Un-break FreeBSD build of __clear_cache
Jessica Clarke via llvm-commits
- [PATCH] D155379: [PowerPC] Reorder setMaxAtomicSizeInBitsSupported(). NFC
Brad Smith via Phabricator via llvm-commits
- [llvm] 7a31ac3 - [InstrProf] Stabilize --show-prof-sym-list dump order
Fangrui Song via llvm-commits
- [llvm] 8845250 - [DAG] Improve carry reconstruction in combineCarryDiamond.
Amaury Séchet via llvm-commits
- [PATCH] D152928: [RFC][DAG] Initially add nodes in the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D148854: [llvm-stress] Switch to a FuzzMutate driver
Zhenkai Weng via Phabricator via llvm-commits
- [llvm] f6cce56 - [Support] Change StringMap hash function from xxHash64 to xxh3_64bits
Fangrui Song via llvm-commits
- [llvm] a3e524d - [PowerPC] Reorder setMaxAtomicSizeInBitsSupported(). NFC
Brad Smith via llvm-commits
- [PATCH] D142949: [lld] Destroy CommonLinkerContext inside lld::*::link after D108850
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output for CoV5
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- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Brad Smith via Phabricator via llvm-commits
- [PATCH] D156043: [BOLT][NFC] Simplify YAMLProfileReader
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D156005: Go back to using DenseMapInfo<T>::isEqual instead of operator== in SmallSetVector
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D156046: [Support] Rewrite GlobPattern
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D156048: [RISCV] Remove unused check prefixes for tests. NFC
Jim Lin via Phabricator via llvm-commits
- [llvm] 41af6ec - [PowerPC/SPE] powerpcspe load and store instruction has
Kishan Parmar via llvm-commits
- [PATCH] D156049: [SPIR-V] Remove -opaque-pointers=0 from LITs, fixes for opaque pointers support
Michal Paszkowski via Phabricator via llvm-commits
- [llvm] 92bf83c - [X86] Add basic test coverage for funnels shifts of sub-128-bit vector types
Simon Pilgrim via llvm-commits
- [llvm] da0f248 - [X86] LowerFunnelShift - manually expand funnel shifts by splat constant patterns.
Simon Pilgrim via llvm-commits
- [PATCH] D149679: [SPIR-V] [WIP] Convert tests to opaque pointers
Michal Paszkowski via Phabricator via llvm-commits
- [llvm] d1c5a7e - Add missing 'namespace X86' closing comment to appease static analyser. NFC.
Simon Pilgrim via llvm-commits
- [PATCH] D156050: [X86][FP16] Split v32f16 shuffle when feature BWI is off
Phoebe Wang via Phabricator via llvm-commits
- [llvm] bfec706 - [X86] X86ISelLowering.cpp - fix some mixed case SDLoc variable names. NFC.
Simon Pilgrim via llvm-commits
- [llvm] ac3f689 - [InstCombine] Do not assume scalar types in `select`/`zext`
Antonio Frighetto via llvm-commits
- [PATCH] D154841: [AIC] Fix the sext cost operands in tryToFPToSat
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] bcf35a8 - [InstCombine] Regenerate test checks (NFC)
Antonio Frighetto via llvm-commits
- [llvm] 2974c2a - [X86] lowerRegToMasks - rename masklen -> MaskLenVT. NFC.
Simon Pilgrim via llvm-commits
- [llvm] 88b6d29 - [X86][FP16] Split v32f16 shuffle when feature BWI is off
Phoebe Wang via llvm-commits
- [llvm] 31d8bdb - [Scalarizer] Fold -1 mask in shufflevector to poison instead of undef
Nuno Lopes via llvm-commits
- [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses
Manuel Brito via Phabricator via llvm-commits
- [PATCH] D118572: [NewGVN] Improve phi-of-ops fix to allow loads that loop invariant-ish
Nuno Lopes via Phabricator via llvm-commits
- [llvm] 1ebc965 - [X86] getIntImmCostInst - silence static analyzer overflow warning. NFCI.
Simon Pilgrim via llvm-commits
- [llvm] 9da119a - [X86] getIntImmCostInst - avoid repeating getNumOperands() in for-loop (style). NFC.
Simon Pilgrim via llvm-commits
- [llvm] d8e2821 - [LSR] Use poison instead of undef as placeholder [NFC]
Nuno Lopes via llvm-commits
- [PATCH] D156013: [BOLT] Fix jump table issue for split functions
Maksim Panchenko via Phabricator via llvm-commits
- [llvm] 6edc9a7 - [AArch64][GISel] Additional FPExt vector lowering
David Green via llvm-commits
- [PATCH] D156058: [InstCombine] Fix bug in canonicalization of Pow2 Tests (From: D152673)
Noah Goldstein via Phabricator via llvm-commits
- [llvm] ee50c09 - [InstCombine] Fix bug in canonicalization of Pow2 Tests (From: D152673)
Noah Goldstein via llvm-commits
- [PATCH] D156060: [GISel][AArch64] Close some gaps
Thorsten via Phabricator via llvm-commits
- [llvm] 3ebe606 - [X86] IsEligibleForTailCallOptimization - use for-range loops where possible. NFCI.
Simon Pilgrim via llvm-commits
- [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output
Corbin Robeck via Phabricator via llvm-commits
- [llvm] 9da1382 - [gn build] Port f256fee53430
LLVM GN Syncbot via llvm-commits
- [llvm] 490bf27 - Revert "[clang-tidy] Add bugprone-empty-catch check"
Piotr Zegar via llvm-commits
- [llvm] 495bdfc - [AArch64] Lower fcvtl2 (fpext) via tablegen patterns.
David Green via llvm-commits
- [PATCH] D144748: [clang-tidy] Add bugprone-empty-catch check
Piotr Zegar via Phabricator via llvm-commits
- [lld] 760cad6 - ReleaseNotes: add lld/ELF notes
Fangrui Song via llvm-commits
- [llvm] c5c8040 - [OpenMP] Introduce kernel environment
Shilei Tian via llvm-commits
- [llvm] c979e79 - [LLVM] Remove the module dump introduced mistakenly
Shilei Tian via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
Fangrui Song via Phabricator via llvm-commits
- [llvm] ea72b51 - Reapply: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas""
via llvm-commits
- [llvm] 5533fc1 - [X86] Remove SHA512 from Graniterapids in backend.
Freddy Ye via llvm-commits
- [PATCH] D156068: [WIP] Vectorization for __builtin_prefetch
m-saito-fj via Phabricator via llvm-commits
- [PATCH] D156069: [RISCV] Add lowering for scalar fmaximum/fminimum.
Craig Topper via Phabricator via llvm-commits
- [llvm] f375ee3 - [RISCV] Add codegen for Zfbfmin instructions
Jun Sha via llvm-commits
- [compiler-rt] fd0aa70 - [sanitizer] use the right type for sizeof for interceptor hook
Fangrui Song via llvm-commits
- [llvm] 1f8f876 - [CMake] Disable GCC -Wnonnull
Fangrui Song via llvm-commits
- [PATCH] D155857: [CMake] Disable GCC -Wnonnull
Fangrui Song via Phabricator via llvm-commits
- [llvm] 0aaeb88 - [AArch64][GlobalISel] Legalize <2 x s8> and <4 x s8> for G_BUILD_VECTOR
via llvm-commits
- [llvm] 6bd74fd - Revert commits for kernel environment
Shilei Tian via llvm-commits
- [llvm] e6a0b94 - [AArch64][GlobalISel] Remove unused variable 'v2s8' in AArch64LegalizerInfo.cpp (NFC)
Jie Fu via llvm-commits
- [llvm] 49f3435 - [RISCV] Adjust definition order in RISCVInstrInfoZvk.td to be the same with other td file
Jim Lin via llvm-commits
- [PATCH] D154808: [RISCV] Add tests for (and (add x, c1), (lshr y, c2))
hev via Phabricator via llvm-commits
- [PATCH] D156071: [HIP] Update compile options
Yaxun Liu via Phabricator via llvm-commits
- [llvm] c48ed93 - [AMDGPU] Add llvm.amdgcn.wave.reduce.umin/umax Intrinsic.
Pravin Jagtap via llvm-commits
- [llvm] 7761958 - [XCOFF] Write source language ID and CPU version ID into C_FILE symbol.
via llvm-commits
- [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 32 for MIPS I
YunQiang Su via Phabricator via llvm-commits
- [PATCH] D156073: refactor hip_build.sh to facilitate local test
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D156075: [RISCV] Remove combineCmpOp and associated code. NFCI
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154488: [PowerPC] Define SchedModel for Power8
Qiu Chaofan via Phabricator via llvm-commits
- [llvm] d6675b6 - [LoongArch] Add definition for LVZ/LBT instructions
Weining Lu via llvm-commits
- [PATCH] D143248: Emit CFI directives in epilogue and enable CFIFixup pass for RISC-V.
Varun Kumar E via Phabricator via llvm-commits
- [llvm] 78d91df - [RISCV] Support register allocation for GHC when f/d is not specified in the architecture
via llvm-commits
- [llvm] 37b474a - [RISCV] Remove unused check prefixes for tests. NFC
Jim Lin via llvm-commits
- [PATCH] D156077: [AMDGPU] Perform basic folds on llvm.amdgcn.wave.reduce.umin/umax.
Pravin Jagtap via Phabricator via llvm-commits
- [llvm] de0d27c - [ConstraintElim] Add test cases from PR63896. NFC.
Yingwei Zheng via llvm-commits
- [llvm] 995f199 - [JITLink][PowerPC] Correct handling of R_PPC64_REL24_NOTOC
Kai Luo via llvm-commits
- [llvm] 74d16b2 - [RISCV] Add Zicond RUN lines to xaluo.ll. NFC
Craig Topper via llvm-commits
- [PATCH] D156081: [RISCV] Add CZERO_EQZ/CZERO_NEZ to computeKnownBitsForTargetNode.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D156082: [RISCV] Add CZERO_EQZ/CZERO_NEZ to ComputeNumSignBitsForTargetNode.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D156083: [RISCV] Add test case for D156082 to condops.ll
Craig Topper via Phabricator via llvm-commits
- [PATCH] D156084: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1
Jim Lin via Phabricator via llvm-commits
- [llvm] 047273f - [clang-tidy] Add bugprone-empty-catch check
Piotr Zegar via llvm-commits
Last message date:
Sun Jul 23 23:59:28 PDT 2023
Archived on: Sun Jul 23 23:59:31 PDT 2023
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