[llvm] 2974c2a - [X86] lowerRegToMasks - rename masklen -> MaskLenVT. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 23 04:27:38 PDT 2023
Author: Simon Pilgrim
Date: 2023-07-23T12:27:33+01:00
New Revision: 2974c2a0c304a91b157d41332bb37c3dd60448ad
URL: https://github.com/llvm/llvm-project/commit/2974c2a0c304a91b157d41332bb37c3dd60448ad
DIFF: https://github.com/llvm/llvm-project/commit/2974c2a0c304a91b157d41332bb37c3dd60448ad.diff
LOG: [X86] lowerRegToMasks - rename masklen -> MaskLenVT. NFC.
Fixes style warning
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index eac0623de7d68a..43bf49a9ca1040 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -3593,22 +3593,22 @@ static SDValue lowerRegToMasks(const SDValue &ValArg, const EVT &ValVT,
assert(ValLoc == MVT::i64 && "Expecting only i64 locations");
// In 64 bit machine, There is no need to truncate the value only bitcast
} else {
- MVT maskLen;
+ MVT MaskLenVT;
switch (ValVT.getSimpleVT().SimpleTy) {
case MVT::v8i1:
- maskLen = MVT::i8;
+ MaskLenVT = MVT::i8;
break;
case MVT::v16i1:
- maskLen = MVT::i16;
+ MaskLenVT = MVT::i16;
break;
case MVT::v32i1:
- maskLen = MVT::i32;
+ MaskLenVT = MVT::i32;
break;
default:
llvm_unreachable("Expecting a vector of i1 types");
}
- ValReturned = DAG.getNode(ISD::TRUNCATE, DL, maskLen, ValReturned);
+ ValReturned = DAG.getNode(ISD::TRUNCATE, DL, MaskLenVT, ValReturned);
}
return DAG.getBitcast(ValVT, ValReturned);
}
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