[PATCH] D155101: [RISCV] Fold ops into vmv.v.v as vmerge with all-ones mask

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 18 09:44:58 PDT 2023


reames added a comment.

First pass, minor comments only. Have to think about this deeper, and am probably going to get distracted in the next few minutes.  Expect further comment later today.



================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:3204
+         Opc == RISCV::PseudoVMERGE_VVM_M2 ||
+         Opc == RISCV::PseudoVMERGE_VVM_M4 || Opc == RISCV::PseudoVMERGE_VVM_M8;
+}
----------------
Formatting: Please use the same format as the lines above for all of the cases, both in this function and next one.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:3273
+  SmallVector<SDValue, 8> VMergeOps;
+  getVMergeOps(N, VMergeOps);
+  SDValue Merge = VMergeOps[0];
----------------
Personally, the helper function is just confusing abstraction rather than helpful.  I'd inline the initialization here, but up to you.  


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:3442
 
-  SDValue SEW = True.getOperand(TrueVLIndex + 1);
-
-  uint64_t Policy = isImplicitDef(N->getOperand(0)) ?
-    RISCVII::TAIL_AGNOSTIC : /*TUMU*/ 0;
+  uint64_t Policy = isImplicitDef(Merge) ? RISCVII::TAIL_AGNOSTIC : /*TUMU*/ 0;
   SDValue PolicyOp =
----------------
Unrelated change, please land and rebase.


Repository:
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  https://reviews.llvm.org/D155101/new/

https://reviews.llvm.org/D155101



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