[PATCH] D155502: [RISCV] Do not use F registers if zvfh/f/d is not specified in the architecture

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:15191
 
   if (LocVT == MVT::i32 || LocVT == MVT::f32) {
     unsigned Offset4 = State.AllocateStack(4, Align(4));
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If we skip the FPRs above, should we be going through GPR before we hit this stack code?


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  https://reviews.llvm.org/D155502/new/

https://reviews.llvm.org/D155502