[PATCH] D155447: [AArch64] Fix an immediate out of range for large realignments on Windows

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:1748
+            .addReg(AArch64::SP)
+            .addReg(AArch64::X16);
+      } else {
----------------
mstorsjo wrote:
> mstorsjo wrote:
> > efriedma wrote:
> > > You could stick a kill flag on x16 here, I guess, although it doesn't matter much this late in the pipeline.
> > > 
> > > Probably we should stick a FrameSetup flag on the add (for both cases).
> > Thanks, will do.
> SP wasn’t a valid register for `ADDXrr` here, as shown by the bots with expensive checks enabled.
> 
> I tried grepping around to see what instruction name I should use here instead, but didn’t have any luck.
> 
> Is it possible to get some dump of what instruction names it uses internally if I assemble the desired instruction from a `.s` file, or does that not pass through those layers at all?
```
$ echo "add x16, sp, x16" | llvm-mc -show-inst -triple=aarch64
        .text
        add     x16, sp, x16                    // <MCInst #1439 ADDXrx64
                                        //  <MCOperand Reg:235>
                                        //  <MCOperand Reg:6>
                                        //  <MCOperand Reg:235>
                                        //  <MCOperand Imm:24>>
```

This is an MCInst, not a MachineInstr, but should be enough to get the idea.  The immediate is an extend (i.e. the instruction is actually "add x16, sp, x16, uxtx #0").


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155447/new/

https://reviews.llvm.org/D155447