[llvm] b172fbf - Revert "[TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f"
Maciej Gabka via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 21 06:50:41 PDT 2023
Author: Maciej Gabka
Date: 2023-07-21T13:50:10Z
New Revision: b172fbff683a3b26d838f85ff97965f94588557c
URL: https://github.com/llvm/llvm-project/commit/b172fbff683a3b26d838f85ff97965f94588557c
DIFF: https://github.com/llvm/llvm-project/commit/b172fbff683a3b26d838f85ff97965f94588557c.diff
LOG: Revert "[TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f"
This reverts commit 791c89600aaa288d7066aea95a1e06cd6d61b2e3.
Added:
Modified:
llvm/include/llvm/Analysis/VecFuncs.def
llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def
index b884c1e3911e6b..8fe996f70b069a 100644
--- a/llvm/include/llvm/Analysis/VecFuncs.def
+++ b/llvm/include/llvm/Analysis/VecFuncs.def
@@ -652,11 +652,6 @@ TLI_DEFINE_VECFUNC("logf", "_ZGVsMxv_logf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVsMxv_log", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVsMxv_logf", SCALABLE(4), MASKED)
-TLI_DEFINE_VECFUNC( "log2", "_ZGVsMxv_log2", SCALABLE(2), MASKED)
-TLI_DEFINE_VECFUNC( "log2f", "_ZGVsMxv_log2f", SCALABLE(4), MASKED)
-TLI_DEFINE_VECFUNC( "llvm.log2.f64", "_ZGVsMxv_log2", SCALABLE(2), MASKED)
-TLI_DEFINE_VECFUNC( "llvm.log2.f32", "_ZGVsMxv_log2f", SCALABLE(4), MASKED)
-
TLI_DEFINE_VECFUNC("log10", "_ZGVsMxv_log10", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("log10f", "_ZGVsMxv_log10f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.log10.f64", "_ZGVsMxv_log10", SCALABLE(2), MASKED)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
index d7decd57d0b966..0d14eccf79fb3e 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
@@ -648,9 +648,8 @@ declare float @llvm.log2.f32(float) #0
define void @log2_f64(double* nocapture %varray) {
; CHECK-LABEL: @log2_f64(
- ; NEON: [[TMP5:%.*]] = call <2 x double> @_ZGVnN2v_log2(<2 x double> [[TMP4:%.*]])
- ; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log2(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
- ; CHECK: ret void
+ ; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVnN2v_log2(<2 x double> [[TMP4:%.*]])
+ ; CHECK: ret void
;
entry:
br label %for.body
@@ -672,9 +671,8 @@ define void @log2_f64(double* nocapture %varray) {
define void @log2_f32(float* nocapture %varray) {
; CHECK-LABEL: @log2_f32(
- ; NEON: [[TMP5:%.*]] = call <4 x float> @_ZGVnN4v_log2f(<4 x float> [[TMP4:%.*]])
- ; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log2f(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
- ; CHECK: ret void
+ ; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVnN4v_log2f(<4 x float> [[TMP4:%.*]])
+ ; CHECK: ret void
;
entry:
br label %for.body
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