[llvm] eb33db4 - [AVR] Enable verifyInstructionPredicates for AVR
Jianjian GUAN via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 18 20:43:46 PDT 2023
Author: Jianjian GUAN
Date: 2023-07-19T11:43:39+08:00
New Revision: eb33db4f9151b3cb87a45d2135b9decc133f3d09
URL: https://github.com/llvm/llvm-project/commit/eb33db4f9151b3cb87a45d2135b9decc133f3d09
DIFF: https://github.com/llvm/llvm-project/commit/eb33db4f9151b3cb87a45d2135b9decc133f3d09.diff
LOG: [AVR] Enable verifyInstructionPredicates for AVR
This patch fixes the failed test of verifyInstructionPredicates which is caused by verifyInstructionPredicates. verifyInstructionPredicates will add JMPk without checking the target predicate.
Reviewed By: benshi001
Differential Revision: https://reviews.llvm.org/D155570
Added:
Modified:
llvm/lib/Target/AVR/AVRAsmPrinter.cpp
llvm/lib/Target/AVR/AVRInstrInfo.cpp
llvm/lib/Target/AVR/AVRInstrInfo.h
llvm/lib/Target/AVR/AVRSubtarget.cpp
llvm/test/CodeGen/AVR/branch-relaxation-long.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AVR/AVRAsmPrinter.cpp b/llvm/lib/Target/AVR/AVRAsmPrinter.cpp
index 0e6ec0268f8579..ceee44ec0f2020 100644
--- a/llvm/lib/Target/AVR/AVRAsmPrinter.cpp
+++ b/llvm/lib/Target/AVR/AVRAsmPrinter.cpp
@@ -189,9 +189,8 @@ bool AVRAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
}
void AVRAsmPrinter::emitInstruction(const MachineInstr *MI) {
- // FIXME: Enable feature predicate checks once all the test pass.
- // AVR_MC::verifyInstructionPredicates(MI->getOpcode(),
- // getSubtargetInfo().getFeatureBits());
+ AVR_MC::verifyInstructionPredicates(MI->getOpcode(),
+ getSubtargetInfo().getFeatureBits());
AVRMCInstLower MCInstLowering(OutContext, *this);
diff --git a/llvm/lib/Target/AVR/AVRInstrInfo.cpp b/llvm/lib/Target/AVR/AVRInstrInfo.cpp
index fdfa3315e20370..b9d27c78ce8e41 100644
--- a/llvm/lib/Target/AVR/AVRInstrInfo.cpp
+++ b/llvm/lib/Target/AVR/AVRInstrInfo.cpp
@@ -35,8 +35,9 @@
namespace llvm {
-AVRInstrInfo::AVRInstrInfo()
- : AVRGenInstrInfo(AVR::ADJCALLSTACKDOWN, AVR::ADJCALLSTACKUP), RI() {}
+AVRInstrInfo::AVRInstrInfo(AVRSubtarget &STI)
+ : AVRGenInstrInfo(AVR::ADJCALLSTACKDOWN, AVR::ADJCALLSTACKUP), RI(),
+ STI(STI) {}
void AVRInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
@@ -569,7 +570,10 @@ void AVRInstrInfo::insertIndirectBranch(MachineBasicBlock &MBB,
// insertBranch or some hypothetical "insertDirectBranch".
// See lib/CodeGen/RegisterRelaxation.cpp for details.
// We end up here when a jump is too long for a RJMP instruction.
- BuildMI(&MBB, DL, get(AVR::JMPk)).addMBB(&NewDestBB);
+ if (STI.hasJMPCALL())
+ BuildMI(&MBB, DL, get(AVR::JMPk)).addMBB(&NewDestBB);
+ else
+ report_fatal_error("cannot create long jump without FeatureJMPCALL");
}
} // end of namespace llvm
diff --git a/llvm/lib/Target/AVR/AVRInstrInfo.h b/llvm/lib/Target/AVR/AVRInstrInfo.h
index f84837a92e1e83..290177f5eec666 100644
--- a/llvm/lib/Target/AVR/AVRInstrInfo.h
+++ b/llvm/lib/Target/AVR/AVRInstrInfo.h
@@ -23,6 +23,8 @@
namespace llvm {
+class AVRSubtarget;
+
namespace AVRCC {
/// AVR specific condition codes.
@@ -63,7 +65,7 @@ enum TOF {
/// Utilities related to the AVR instruction set.
class AVRInstrInfo : public AVRGenInstrInfo {
public:
- explicit AVRInstrInfo();
+ explicit AVRInstrInfo(AVRSubtarget &STI);
const AVRRegisterInfo &getRegisterInfo() const { return RI; }
const MCInstrDesc &getBrCond(AVRCC::CondCodes CC) const;
@@ -116,6 +118,9 @@ class AVRInstrInfo : public AVRGenInstrInfo {
private:
const AVRRegisterInfo RI;
+
+protected:
+ const AVRSubtarget &STI;
};
} // end namespace llvm
diff --git a/llvm/lib/Target/AVR/AVRSubtarget.cpp b/llvm/lib/Target/AVR/AVRSubtarget.cpp
index c4e8d9afd3a99f..8051f9d21714bf 100644
--- a/llvm/lib/Target/AVR/AVRSubtarget.cpp
+++ b/llvm/lib/Target/AVR/AVRSubtarget.cpp
@@ -29,7 +29,7 @@ namespace llvm {
AVRSubtarget::AVRSubtarget(const Triple &TT, const std::string &CPU,
const std::string &FS, const AVRTargetMachine &TM)
- : AVRGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
+ : AVRGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), InstrInfo(*this),
TLInfo(TM, initializeSubtargetDependencies(CPU, FS, TM)) {
// Parse features string.
ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS);
diff --git a/llvm/test/CodeGen/AVR/branch-relaxation-long.ll b/llvm/test/CodeGen/AVR/branch-relaxation-long.ll
index e3e9a6f1d02e1d..b09976320b5622 100644
--- a/llvm/test/CodeGen/AVR/branch-relaxation-long.ll
+++ b/llvm/test/CodeGen/AVR/branch-relaxation-long.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=avr | FileCheck %s
+; RUN: llc < %s -march=avr -mattr=avr3 | FileCheck %s
; CHECK-LABEL: relax_to_jmp:
; CHECK: cpi r{{[0-9]+}}, 0
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