[lld] 82b4368 - [llvm-readobj] Print <null> for relocation target with an empty name
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 20 00:42:43 PDT 2023
Author: Fangrui Song
Date: 2023-07-20T00:42:38-07:00
New Revision: 82b4368f7f89e2b16b9eb09787b7a7af07e3b7cd
URL: https://github.com/llvm/llvm-project/commit/82b4368f7f89e2b16b9eb09787b7a7af07e3b7cd
DIFF: https://github.com/llvm/llvm-project/commit/82b4368f7f89e2b16b9eb09787b7a7af07e3b7cd.diff
LOG: [llvm-readobj] Print <null> for relocation target with an empty name
For a relocation, we don't differentiate the two cases:
* the symbol index is 0
* the symbol index is non zero, the type is not STT_SECTION, and the name is empty. Clang generates such local symbols for RISC-V linker relaxation.
So we may print
```
Offset Info Type Symbol's Value Symbol's Name + Addend
000000000000001c 0000000100000039 R_RISCV_32_PCREL 0000000000000000 0
// llvm-readobj
0x1C R_RISCV_32_PCREL - 0x0
```
while GNU readelf prints "<null>", which is clearer. Let's match the GNU behavior.
Related to https://reviews.llvm.org/D81842
```
000000000000001c 0000000100000039 R_RISCV_32_PCREL 0000000000000000 <null> + 0
// llvm-readobj
0x1C R_RISCV_32_PCREL <null> 0x0
```
Reviewed By: jhenderson, kito-cheng
Differential Revision: https://reviews.llvm.org/D155353
Added:
Modified:
lld/test/ELF/mips-eh_frame-pic.s
llvm/test/CodeGen/RISCV/fixups-diff.ll
llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
llvm/test/MC/ELF/RISCV/gen-dwarf.s
llvm/test/MC/RISCV/cfi-advance.s
llvm/test/MC/RISCV/fde-reloc.s
llvm/test/MC/RISCV/scoped-relaxation.s
llvm/test/tools/llvm-readobj/ELF/reloc-zero-name-or-value.test
llvm/test/tools/yaml2obj/ELF/symbol-name.yaml
llvm/tools/llvm-readobj/ELFDumper.cpp
Removed:
################################################################################
diff --git a/lld/test/ELF/mips-eh_frame-pic.s b/lld/test/ELF/mips-eh_frame-pic.s
index 2d4141143b1230..a84c36b0e5ecdb 100644
--- a/lld/test/ELF/mips-eh_frame-pic.s
+++ b/lld/test/ELF/mips-eh_frame-pic.s
@@ -36,8 +36,8 @@
# RELOCS: .rel{{a?}}.eh_frame {
# ABS32-RELOCS-NEXT: 0x1C R_MIPS_32 .text
# ABS64-RELOCS-NEXT: 0x1C R_MIPS_64/R_MIPS_NONE/R_MIPS_NONE .text
-# PIC64-RELOCS-NEXT: 0x1C R_MIPS_PC32/R_MIPS_NONE/R_MIPS_NONE -
-# PIC32-RELOCS-NEXT: 0x1C R_MIPS_PC32 -
+# PIC64-RELOCS-NEXT: 0x1C R_MIPS_PC32/R_MIPS_NONE/R_MIPS_NONE <null>
+# PIC32-RELOCS-NEXT: 0x1C R_MIPS_PC32 <null>
# RELOCS-NEXT: }
# ABS64-EH-FRAME: Augmentation data: 0C
diff --git a/llvm/test/CodeGen/RISCV/fixups-
diff .ll b/llvm/test/CodeGen/RISCV/fixups-
diff .ll
index be955bf6a37097..69fbed5a45a40d 100644
--- a/llvm/test/CodeGen/RISCV/fixups-
diff .ll
+++ b/llvm/test/CodeGen/RISCV/fixups-
diff .ll
@@ -23,16 +23,16 @@ entry:
}
; CHECK: Section {{.*}} .rela.debug_info {
-; CHECK: 0x22 R_RISCV_ADD32 - 0x0
-; CHECK-NEXT: 0x22 R_RISCV_SUB32 - 0x0
-; CHECK: 0x2B R_RISCV_ADD32 - 0x0
-; CHECK-NEXT: 0x2B R_RISCV_SUB32 - 0x0
+; CHECK: 0x22 R_RISCV_ADD32 <null> 0x0
+; CHECK-NEXT: 0x22 R_RISCV_SUB32 <null> 0x0
+; CHECK: 0x2B R_RISCV_ADD32 <null> 0x0
+; CHECK-NEXT: 0x2B R_RISCV_SUB32 <null> 0x0
; CHECK: }
; CHECK: Section {{.*}} .rela.eh_frame {
-; CHECK: 0x1C R_RISCV_32_PCREL - 0x0
-; CHECK: 0x20 R_RISCV_ADD32 - 0x0
-; CHECK-NEXT: 0x20 R_RISCV_SUB32 - 0x0
+; CHECK: 0x1C R_RISCV_32_PCREL <null> 0x0
+; CHECK: 0x20 R_RISCV_ADD32 <null> 0x0
+; CHECK-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
; CHECK: }
!llvm.dbg.cu = !{!0}
diff --git a/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll b/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
index 07287a9ca25737..b49ca8967a95e2 100644
--- a/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
+++ b/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
@@ -6,14 +6,14 @@
; Check that we actually have relocations, otherwise this is kind of pointless.
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_info {
-; READOBJ-RELOCS: 0x1B R_RISCV_ADD32 - 0x0
-; READOBJ-RELOCS-NEXT: 0x1B R_RISCV_SUB32 - 0x0
+; READOBJ-RELOCS: 0x1B R_RISCV_ADD32 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x1B R_RISCV_SUB32 <null> 0x0
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_frame {
-; READOBJ-RELOCS: 0x20 R_RISCV_ADD32 - 0x0
-; READOBJ-RELOCS-NEXT: 0x20 R_RISCV_SUB32 - 0x0
+; READOBJ-RELOCS: 0x20 R_RISCV_ADD32 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_line {
-; READOBJ-RELOCS: 0x5A R_RISCV_ADD16 - 0x0
-; READOBJ-RELOCS-NEXT: 0x5A R_RISCV_SUB16 - 0x0
+; READOBJ-RELOCS: 0x5A R_RISCV_ADD16 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x5A R_RISCV_SUB16 <null> 0x0
; Check that we can print the source, even with relocations.
; OBJDUMP-SOURCE: Disassembly of section .text:
diff --git a/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll b/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
index 280da01567a2b9..928ac98477a3a0 100644
--- a/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
+++ b/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
@@ -4,15 +4,15 @@
; RUN: | FileCheck -check-prefix=RELAX-DWARFDUMP %s
;
; RELAX: Section ({{.*}}) .rela.eh_frame {
-; RELAX-NEXT: 0x1C R_RISCV_32_PCREL - 0x0
-; RELAX-NEXT: 0x20 R_RISCV_ADD32 - 0x0
-; RELAX-NEXT: 0x20 R_RISCV_SUB32 - 0x0
-; RELAX-NEXT: 0x30 R_RISCV_32_PCREL - 0x0
-; RELAX-NEXT: 0x34 R_RISCV_ADD32 - 0x0
-; RELAX-NEXT: 0x34 R_RISCV_SUB32 - 0x0
-; RELAX-NEXT: 0x44 R_RISCV_32_PCREL - 0x0
-; RELAX-NEXT: 0x48 R_RISCV_ADD32 - 0x0
-; RELAX-NEXT: 0x48 R_RISCV_SUB32 - 0x0
+; RELAX-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x20 R_RISCV_ADD32 <null> 0x0
+; RELAX-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
+; RELAX-NEXT: 0x30 R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x34 R_RISCV_ADD32 <null> 0x0
+; RELAX-NEXT: 0x34 R_RISCV_SUB32 <null> 0x0
+; RELAX-NEXT: 0x44 R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x48 R_RISCV_ADD32 <null> 0x0
+; RELAX-NEXT: 0x48 R_RISCV_SUB32 <null> 0x0
; RELAX-NEXT: }
; RELAX-DWARFDUMP-NOT: error: failed to compute relocation
diff --git a/llvm/test/MC/ELF/RISCV/gen-dwarf.s b/llvm/test/MC/ELF/RISCV/gen-dwarf.s
index 670f833f258d25..9a2bab883ba5c0 100644
--- a/llvm/test/MC/ELF/RISCV/gen-dwarf.s
+++ b/llvm/test/MC/ELF/RISCV/gen-dwarf.s
@@ -40,14 +40,14 @@
# CHECK-NEXT: 0x00000020: [DW_RLE_end_of_list ]
# RELOC: Section ([[#]]) .rela.eh_frame {
-# RELOC-NEXT: 0x1C R_RISCV_32_PCREL - 0x0
-# RELOC-NEXT: 0x20 R_RISCV_ADD32 - 0x0
-# RELOC-NEXT: 0x20 R_RISCV_SUB32 - 0x0
-# RELOC-NEXT: 0x25 R_RISCV_SET6 - 0x0
-# RELOC-NEXT: 0x25 R_RISCV_SUB6 - 0x0
-# RELOC-NEXT: 0x34 R_RISCV_32_PCREL - 0x0
-# RELOC-NEXT: 0x38 R_RISCV_ADD32 - 0x0
-# RELOC-NEXT: 0x38 R_RISCV_SUB32 - 0x0
+# RELOC-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+# RELOC-NEXT: 0x20 R_RISCV_ADD32 <null> 0x0
+# RELOC-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
+# RELOC-NEXT: 0x25 R_RISCV_SET6 <null> 0x0
+# RELOC-NEXT: 0x25 R_RISCV_SUB6 <null> 0x0
+# RELOC-NEXT: 0x34 R_RISCV_32_PCREL <null> 0x0
+# RELOC-NEXT: 0x38 R_RISCV_ADD32 <null> 0x0
+# RELOC-NEXT: 0x38 R_RISCV_SUB32 <null> 0x0
# RELOC-NEXT: }
## TODO A section needs two relocations.
@@ -57,12 +57,12 @@
# RELOC-NEXT: }
# RELOC: Section ([[#]]) .rela.debug_line {
-# RELOC: R_RISCV_ADD16 - 0x0
-# RELOC-NEXT: R_RISCV_SUB16 - 0x0
-# RELOC-NEXT: R_RISCV_ADD16 - 0x0
-# RELOC-NEXT: R_RISCV_SUB16 - 0x0
-# RELOC-NEXT: R_RISCV_ADD16 - 0x0
-# RELOC-NEXT: R_RISCV_SUB16 - 0x0
+# RELOC: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
+# RELOC-NEXT: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
+# RELOC-NEXT: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
# RELOC: }
.section .text.foo,"ax"
diff --git a/llvm/test/MC/RISCV/cfi-advance.s b/llvm/test/MC/RISCV/cfi-advance.s
index 5520c7ad330df0..accff5a6fb8260 100644
--- a/llvm/test/MC/RISCV/cfi-advance.s
+++ b/llvm/test/MC/RISCV/cfi-advance.s
@@ -4,9 +4,9 @@
# RUN: | FileCheck -check-prefix=CHECK-DWARFDUMP %s
# CHECK: .rela.eh_frame {
-# CHECK-NEXT: 0x1C R_RISCV_32_PCREL - 0x0
-# CHECK-NEXT: 0x20 R_RISCV_ADD32 - 0x0
-# CHECK-NEXT: 0x20 R_RISCV_SUB32 - 0x0
+# CHECK-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+# CHECK-NEXT: 0x20 R_RISCV_ADD32 <null> 0x0
+# CHECK-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
# CHECK-NEXT: }
# CHECK-DWARFDUMP: DW_CFA_advance_loc1
# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset
diff --git a/llvm/test/MC/RISCV/fde-reloc.s b/llvm/test/MC/RISCV/fde-reloc.s
index d7c3f5c2bb72e6..4a5f3ea712a1c4 100644
--- a/llvm/test/MC/RISCV/fde-reloc.s
+++ b/llvm/test/MC/RISCV/fde-reloc.s
@@ -12,7 +12,7 @@ func:
.cfi_endproc
# CHECK: Section (4) .rela.eh_frame {
-# CHECK-NEXT: 0x1C R_RISCV_32_PCREL - 0x0
-# CHECK-NEXT: 0x20 R_RISCV_ADD32 - 0x0
-# CHECK-NEXT: 0x20 R_RISCV_SUB32 - 0x0
+# CHECK-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+# CHECK-NEXT: 0x20 R_RISCV_ADD32 <null> 0x0
+# CHECK-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
# CHECK-NEXT: }
diff --git a/llvm/test/MC/RISCV/scoped-relaxation.s b/llvm/test/MC/RISCV/scoped-relaxation.s
index 6cb82536fcda89..0b797ee5aca5eb 100644
--- a/llvm/test/MC/RISCV/scoped-relaxation.s
+++ b/llvm/test/MC/RISCV/scoped-relaxation.s
@@ -9,7 +9,7 @@
.dword function - .
# CHECK: 0x0 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x0 R_RISCV_SUB64 - 0x0
+# CHECK-NEXT: 0x0 R_RISCV_SUB64 <null> 0x0
# Relaxed reference, this will resolve to a pair of `RISCV_ADD64` and
# `RISCV_SUB64` relocation.
@@ -19,7 +19,7 @@
.option pop
# CHECK: 0x8 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x8 R_RISCV_SUB64 - 0x0
+# CHECK-NEXT: 0x8 R_RISCV_SUB64 <null> 0x0
# Unrelaxed reference, this will resolve to a pair of `RISCV_ADD64` and
# `RISCV_SUB64` relocation due to relaxation being sticky to the file.
@@ -29,6 +29,6 @@
.option pop
# CHECK: 0x10 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x10 R_RISCV_SUB64 - 0x0
+# CHECK-NEXT: 0x10 R_RISCV_SUB64 <null> 0x0
# CHECK: }
diff --git a/llvm/test/tools/llvm-readobj/ELF/reloc-zero-name-or-value.test b/llvm/test/tools/llvm-readobj/ELF/reloc-zero-name-or-value.test
index a44ff3d490d7a1..823e573a297696 100644
--- a/llvm/test/tools/llvm-readobj/ELF/reloc-zero-name-or-value.test
+++ b/llvm/test/tools/llvm-readobj/ELF/reloc-zero-name-or-value.test
@@ -10,42 +10,42 @@
# CHECK-NEXT: Offset Info Type Symbol's Value Symbol's Name + Addend
# CHECK-NEXT: 0000000000000000 0000000000000000 R_X86_64_NONE 1
# CHECK-NEXT: 0000000000000000 0000000100000000 R_X86_64_NONE 0000000000000000 sym + 1
-# CHECK-NEXT: 0000000000000000 0000000200000000 R_X86_64_NONE 0000000000000123 456
+# CHECK-NEXT: 0000000000000000 0000000200000000 R_X86_64_NONE 0000000000000123 <null> + 456
# CHECK-NEXT: warning: '[[FILE]]': unable to get section index for symbol with st_shndx = 0x0 (SHN_UNDEF)
# CHECK-NEXT: 0000000000000000 0000000300000000 R_X86_64_NONE 0000000000000000 <?> + 678
-# CHECK-NEXT: 0000000000000000 0000000400000000 R_X86_64_NONE 0000000000000000 2
+# CHECK-NEXT: 0000000000000000 0000000400000000 R_X86_64_NONE 0000000000000000 <null> + 2
# CHECK: Relocation section '.rela.dyn' at offset {{.*}} contains 5 entries:
# CHECK-NEXT: Offset Info Type Symbol's Value Symbol's Name + Addend
# CHECK-NEXT: 0000000000000000 0000000000000000 R_X86_64_NONE 1
# CHECK-NEXT: 0000000000000000 0000000100000000 R_X86_64_NONE 0000000000000000 sym + 1
-# CHECK-NEXT: 0000000000000000 0000000200000000 R_X86_64_NONE 0000000000000123 456
+# CHECK-NEXT: 0000000000000000 0000000200000000 R_X86_64_NONE 0000000000000123 <null> + 456
# CHECK-NEXT: 0000000000000000 0000000300000000 R_X86_64_NONE 0000000000000000 <?> + 678
-# CHECK-NEXT: 0000000000000000 0000000400000000 R_X86_64_NONE 0000000000000000 2
+# CHECK-NEXT: 0000000000000000 0000000400000000 R_X86_64_NONE 0000000000000000 <null> + 2
# CHECK: 'RELA' relocation section at offset {{.*}} contains 120 bytes:
# CHECK-NEXT: Offset Info Type Symbol's Value Symbol's Name + Addend
# CHECK-NEXT: 0000000000000000 0000000000000000 R_X86_64_NONE 1
# CHECK-NEXT: 0000000000000000 0000000100000000 R_X86_64_NONE 0000000000000000 sym + 1
-# CHECK-NEXT: 0000000000000000 0000000200000000 R_X86_64_NONE 0000000000000123 456
-# CHECK-NEXT: 0000000000000000 0000000300000000 R_X86_64_NONE 0000000000000000 678
-# CHECK-NEXT: 0000000000000000 0000000400000000 R_X86_64_NONE 0000000000000000 2
+# CHECK-NEXT: 0000000000000000 0000000200000000 R_X86_64_NONE 0000000000000123 <null> + 456
+# CHECK-NEXT: 0000000000000000 0000000300000000 R_X86_64_NONE 0000000000000000 <null> + 678
+# CHECK-NEXT: 0000000000000000 0000000400000000 R_X86_64_NONE 0000000000000000 <null> + 2
# LLVM: Relocations [
# LLVM-NEXT: Section (2) .rela.text {
# LLVM-NEXT: 0x0 R_X86_64_NONE - 0x1
# LLVM-NEXT: 0x0 R_X86_64_NONE sym 0x1
-# LLVM-NEXT: 0x0 R_X86_64_NONE - 0x456
+# LLVM-NEXT: 0x0 R_X86_64_NONE <null> 0x456
# LLVM-NEXT: warning: '[[FILE]]': unable to get section index for symbol with st_shndx = 0x0 (SHN_UNDEF)
# LLVM-NEXT: 0x0 R_X86_64_NONE <?> 0x678
-# LLVM-NEXT: 0x0 R_X86_64_NONE - 0x2
+# LLVM-NEXT: 0x0 R_X86_64_NONE <null> 0x2
# LLVM-NEXT: }
# LLVM-NEXT: Section (4) .rela.dyn {
# LLVM-NEXT: 0x0 R_X86_64_NONE - 0x1
# LLVM-NEXT: 0x0 R_X86_64_NONE sym 0x1
-# LLVM-NEXT: 0x0 R_X86_64_NONE - 0x456
+# LLVM-NEXT: 0x0 R_X86_64_NONE <null> 0x456
# LLVM-NEXT: 0x0 R_X86_64_NONE <?> 0x678
-# LLVM-NEXT: 0x0 R_X86_64_NONE - 0x2
+# LLVM-NEXT: 0x0 R_X86_64_NONE <null> 0x2
# LLVM-NEXT: }
# LLVM-NEXT: ]
diff --git a/llvm/test/tools/yaml2obj/ELF/symbol-name.yaml b/llvm/test/tools/yaml2obj/ELF/symbol-name.yaml
index 861e2ea52bf562..cdd75f3b8a864b 100644
--- a/llvm/test/tools/yaml2obj/ELF/symbol-name.yaml
+++ b/llvm/test/tools/yaml2obj/ELF/symbol-name.yaml
@@ -38,7 +38,7 @@ Symbols:
# BOTH-NEXT: Relocation {
# BOTH-NEXT: Offset: 0x0
# BOTH-NEXT: Type: R_X86_64_NONE (0)
-# BOTH-NEXT: Symbol: - (1)
+# BOTH-NEXT: Symbol: <null> (1)
# BOTH-NEXT: Addend: 0x0
# BOTH-NEXT: }
# BOTH-NEXT: }
diff --git a/llvm/tools/llvm-readobj/ELFDumper.cpp b/llvm/tools/llvm-readobj/ELFDumper.cpp
index b77f2f2a2c7d72..aa924823e5548c 100644
--- a/llvm/tools/llvm-readobj/ELFDumper.cpp
+++ b/llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -3761,15 +3761,18 @@ void GNUELFDumper<ELFT>::printRelRelaReloc(const Relocation<ELFT> &R,
if (RelSym.Sym)
Fields[3].Str =
to_string(format_hex_no_prefix(RelSym.Sym->getValue(), Width));
+ if (RelSym.Sym && RelSym.Name.empty())
+ Fields[4].Str = "<null>";
+ else
+ Fields[4].Str = std::string(RelSym.Name);
- Fields[4].Str = std::string(RelSym.Name);
for (const Field &F : Fields)
printField(F);
std::string Addend;
if (std::optional<int64_t> A = R.Addend) {
int64_t RelAddend = *A;
- if (!RelSym.Name.empty()) {
+ if (!Fields[4].Str.empty()) {
if (RelAddend < 0) {
Addend = " - ";
RelAddend = std::abs(RelAddend);
@@ -6951,6 +6954,8 @@ template <class ELFT>
void LLVMELFDumper<ELFT>::printRelRelaReloc(const Relocation<ELFT> &R,
const RelSymbol<ELFT> &RelSym) {
StringRef SymbolName = RelSym.Name;
+ if (RelSym.Sym && RelSym.Name.empty())
+ SymbolName = "<null>";
SmallString<32> RelocName;
this->Obj.getRelocationTypeName(R.Type, RelocName);
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