[PATCH] D155623: [AArch64][NFC] Expand coverage of ReplaceWithVeclib testing using SLEEF vector library

[Jolanta Jensen via Phabricator via llvm-commits]

jolanta.jensen added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef.ll:186
+
+define <2 x double> @llvm_log10_f64(<2 x double> %in) {
+; CHECK-LABEL: @llvm_log10_f64(
----------------
mgabka wrote:
> nit: I think that  log10 should be before log2 if we are aiming to keep alphabetical order
Reordered so log10 is before log2.


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  https://reviews.llvm.org/D155623/new/

https://reviews.llvm.org/D155623