[llvm] cee7e7b - [ARM] Correctly handle execute-only in EmitStructByval

[John Brawn via llvm-commits]

Author: John Brawn
Date: 2023-07-19T13:56:36+01:00
New Revision: cee7e7b2454d5dc35c012f35d6945c12fbc5b075

URL: https://github.com/llvm/llvm-project/commit/cee7e7b2454d5dc35c012f35d6945c12fbc5b075
DIFF: https://github.com/llvm/llvm-project/commit/cee7e7b2454d5dc35c012f35d6945c12fbc5b075.diff

LOG: [ARM] Correctly handle execute-only in EmitStructByval

Currently when compiling for an execute-only target without movt then
EmitStructByval will generate a constant pool load which isn't
compatible with execute-only. Handle this by emitting tMOVi32imm,
and also simplify the existing movt handling by emitting t2MOVi32imm
or MOVi32imm.

Differential Revision: https://reviews.llvm.org/D154944

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMISelLowering.cpp
    llvm/test/CodeGen/ARM/execute-only.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 7420b90ef831df..5239e5c4d91b10 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -11493,18 +11493,12 @@ ARMTargetLowering::EmitStructByval(MachineInstr &MI,
   // Load an immediate to varEnd.
   Register varEnd = MRI.createVirtualRegister(TRC);
   if (Subtarget->useMovt()) {
-    unsigned Vtmp = varEnd;
-    if ((LoopSize & 0xFFFF0000) != 0)
-      Vtmp = MRI.createVirtualRegister(TRC);
-    BuildMI(BB, dl, TII->get(IsThumb ? ARM::t2MOVi16 : ARM::MOVi16), Vtmp)
-        .addImm(LoopSize & 0xFFFF)
-        .add(predOps(ARMCC::AL));
-
-    if ((LoopSize & 0xFFFF0000) != 0)
-      BuildMI(BB, dl, TII->get(IsThumb ? ARM::t2MOVTi16 : ARM::MOVTi16), varEnd)
-          .addReg(Vtmp)
-          .addImm(LoopSize >> 16)
-          .add(predOps(ARMCC::AL));
+    BuildMI(BB, dl, TII->get(IsThumb ? ARM::t2MOVi32imm : ARM::MOVi32imm),
+            varEnd)
+        .addImm(LoopSize);
+  } else if (Subtarget->genExecuteOnly()) {
+    assert(IsThumb && "Non-thumb expected to have used movt");
+    BuildMI(BB, dl, TII->get(ARM::tMOVi32imm), varEnd).addImm(LoopSize);
   } else {
     MachineConstantPool *ConstantPool = MF->getConstantPool();
     Type *Int32Ty = Type::getInt32Ty(MF->getFunction().getContext());

diff  --git a/llvm/test/CodeGen/ARM/execute-only.ll b/llvm/test/CodeGen/ARM/execute-only.ll
index 94efc4c2f362ab..9159579c1b0b51 100644
--- a/llvm/test/CodeGen/ARM/execute-only.ll
+++ b/llvm/test/CodeGen/ARM/execute-only.ll
@@ -207,3 +207,24 @@ define i32 @test_imm_middle_bytes() {
 
   ret i32 u0x223300
 }
+
+; This struct is sized so that the byval call does an inline memcpy of
+; 0x10001 bytes.
+%struct.struct_t = type { [65553 x i8] }
+ at byval_arg = global %struct.struct_t zeroinitializer
+declare void @byval_fn(ptr byval(%struct.struct_t))
+
+define void @test_byval_call() {
+entry:
+; CHECK-LABEL: test_byval_call:
+; CHECK-T2BASE: movw [[BYVAL_CPYSIZE:r[0-9]+]], #1
+; CHECK-T2: movs [[BYVAL_CPYSIZE:r[0-9]+]], #1
+; CHECK: movt [[BYVAL_CPYSIZE]], #1
+; CHECK-T1-LABEL: test_byval_call:
+; CHECK-T1: movs [[BYVAL_CPYSIZE:r[0-9]+]], #1
+; CHECK-T1: lsls [[BYVAL_CPYSIZE]], [[BYVAL_CPYSIZE]], #16
+; CHECK-T1: adds [[BYVAL_CPYSIZE]], #1
+
+  call void @byval_fn(ptr byval(%struct.struct_t) @byval_arg)
+  ret void
+}