[PATCH] D155502: [RISCV] Do not use FPR registers for fastcc if zfh/f/d is not specified in the architecture

[Alex Bradbury via Phabricator via llvm-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

LGTM.



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:15191
 
+  // Check if there is available GPR before hitting the stack
+  if (LocVT == MVT::f16 || LocVT == MVT::f32 ||
----------------
nit: end with full stop and "an available".


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D155502/new/

https://reviews.llvm.org/D155502