[PATCH] D155871: [AArch64] Lower fcvtl2 (fpext) via tablegen patterns.

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: aemerson, paquette, samtebbs, chuongg3.
Herald added subscribers: hiraditya, kristof.beyls.
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This patch does two things. First it removes the tryHighFPExt DAG2DAG method used to select fcvtl2 instructions, using tablegen patterns using SelectExtractHigh instead. This essentially undoes D71515 <https://reviews.llvm.org/D71515>, in a way that should hopefully avoid any regressions. The second is that a GI equivalent of SelectExtractHigh is added in selectExtractHigh, from G_UNMERGE_.VALUES. The end result is that GlobalISel (and some constrained fpext) can now make use of the fcvtl2 instructions, saving an extra mov/ext.


https://reviews.llvm.org/D155871

Files:
  llvm/include/llvm/Target/GlobalISel/Target.td
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
  llvm/test/CodeGen/AArch64/fpext.ll

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