[PATCH] D155329: [TableGen][CodeEmitterGen] Add support for querying operand bit offsets

[Ilya Leoshkevich via Phabricator via llvm-commits]

iii updated this revision to Diff 541428.
iii added a comment.

- Fix the handling of multi-lit instructions on little-endian. The code used to return the start of the last lit, which is not useful.

Example	output with this change:

  case RISCV::AUIPC:
  case RISCV::JAL:
  case RISCV::LUI: {
    switch (OpNum) {
    case 1:
      // op: imm20
      return IsLittleEndian ? 12 : 0;
    case 0:
      // op: rd
      return IsLittleEndian ? 7 : 20;
    }
    break;
  }



  case SystemZ::CFI:
  case SystemZ::CGFI:
  case SystemZ::CIH:
  case SystemZ::CLFI:
  case SystemZ::CLGFI:
  case SystemZ::CLIH:
  case SystemZ::IIHF:
  case SystemZ::IILF:
  case SystemZ::LGFI:
  case SystemZ::LLIHF:
  case SystemZ::LLILF: {
    switch (OpNum) {
    case 0:
      // op: R1
      return IsLittleEndian ? 36 : 8;
    case 1:
      // op: I2
      return IsLittleEndian ? 0 : 16;
    }
    break;
  }


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155329/new/

https://reviews.llvm.org/D155329

Files:
  llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
  llvm/utils/TableGen/CodeEmitterGen.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D155329.541428.patch
Type: text/x-patch
Size: 13498 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230718/c1d5b749/attachment.bin>