[PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/include/llvm/CodeGen/TargetLowering.h:3971
+  //     -> (bitcast_to_FP (add (bitcast_to_INT C), Log2(Pow2) << mantissa))
+  // (fdiv C, (uitofp Pow2))
+  //     -> (bitcast_to_FP (sub (bitcast_to_INT C), Log2(Pow2) << mantissa))
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goldstein.w.n wrote:
> arsenm wrote:
> > I think this should just use the fmul case, and turn the compatible fdivs to fmul 
> I'm not sure I understand. We will need an `fdiv` no matter what, at the very least for the reciprocal of the pow2.
I mean you can rewrite fdiv by power of 2 as fmul by 2 to the negative power


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  https://reviews.llvm.org/D154805/new/

https://reviews.llvm.org/D154805