[llvm] 8b4d733 - [X86] Enable ISD::TRUNCATE support from v2i64 and v4i64 nodes
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 22 08:04:11 PDT 2023
Author: Simon Pilgrim
Date: 2023-07-22T16:04:00+01:00
New Revision: 8b4d7333f4a16457f471d1790638f742e7f2c5fb
URL: https://github.com/llvm/llvm-project/commit/8b4d7333f4a16457f471d1790638f742e7f2c5fb
DIFF: https://github.com/llvm/llvm-project/commit/8b4d7333f4a16457f471d1790638f742e7f2c5fb.diff
LOG: [X86] Enable ISD::TRUNCATE support from v2i64 and v4i64 nodes
Addresses the last comment from D154592 - ensure we only truncate with PACKSS/PACKUS when it can be cheaply done (and use shuffles otherwise).
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index d5cbaedd80bae0..71366db71c3d36 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1240,9 +1240,11 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::TRUNCATE, MVT::v2i8, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v2i16, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v2i32, Custom);
+ setOperationAction(ISD::TRUNCATE, MVT::v2i64, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v4i8, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v4i16, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v4i32, Custom);
+ setOperationAction(ISD::TRUNCATE, MVT::v4i64, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v8i8, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v8i16, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v8i32, Custom);
@@ -22959,6 +22961,13 @@ static SDValue LowerTruncateVecPackWithSignBits(MVT DstVT, SDValue In,
SrcSVT.getSizeInBits() > (DstSVT.getSizeInBits() * 2))
return SDValue();
+ // Prefer to lower v4i64 -> v4i32 as a shuffle unless we can cheaply
+ // split this for packing.
+ if (SrcVT == MVT::v4i64 && DstVT == MVT::v4i32 &&
+ !isFreeToSplitVector(In.getNode(), DAG) &&
+ (!Subtarget.hasInt256() || DAG.ComputeNumSignBits(In) != 64))
+ return SDValue();
+
// If the upper half of the source is undef, then attempt to split and
// only truncate the lower half.
if (DstVT.getSizeInBits() >= 128) {
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