[llvm] ac715f7 - [RISCV] Simplify setOperationAction for f64 ceil/floor/round/trunc/etc. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 22 12:18:40 PDT 2023


Author: Craig Topper
Date: 2023-07-22T12:13:33-07:00
New Revision: ac715f7f5b0df44efd2052ab0bf94517e4b04aa2

URL: https://github.com/llvm/llvm-project/commit/ac715f7f5b0df44efd2052ab0bf94517e4b04aa2
DIFF: https://github.com/llvm/llvm-project/commit/ac715f7f5b0df44efd2052ab0bf94517e4b04aa2.diff

LOG: [RISCV] Simplify setOperationAction for f64 ceil/floor/round/trunc/etc. NFC

We were setting the operations as Legal for Zfa in two places. Use
an else to avoid this.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index b7aff1ab550d03..67a8ac5b6ee767 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -447,12 +447,11 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
       setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal);
       setOperationAction(ISD::BITCAST, MVT::i64, Custom);
       setOperationAction(ISD::BITCAST, MVT::f64, Custom);
+    } else {
+      if (Subtarget.is64Bit())
+        setOperationAction(FPRndMode, MVT::f64, Custom);
     }
 
-    if (Subtarget.is64Bit())
-      setOperationAction(FPRndMode, MVT::f64,
-                         Subtarget.hasStdExtZfa() ? Legal : Custom);
-
     setOperationAction(ISD::STRICT_FP_ROUND, MVT::f32, Legal);
     setOperationAction(ISD::STRICT_FP_EXTEND, MVT::f64, Legal);
     setCondCodeAction(FPCCToExpand, MVT::f64, Expand);


        


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