[llvm] 09174c0 - [RISCV] Remove unused Opcode field from RVInst16. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 20 08:18:42 PDT 2023


Author: Craig Topper
Date: 2023-07-20T08:18:06-07:00
New Revision: 09174c085389702ba703344d56a6f657a898dab8

URL: https://github.com/llvm/llvm-project/commit/09174c085389702ba703344d56a6f657a898dab8
DIFF: https://github.com/llvm/llvm-project/commit/09174c085389702ba703344d56a6f657a898dab8.diff

LOG: [RISCV] Remove unused Opcode field from RVInst16. NFC

Unlike RVInst which also has an Opcode field, all of the subclasseso
of RVInst16 assign Inst{1-0} directly.

Reviewed By: asb, wangpc

Differential Revision: https://reviews.llvm.org/D155791

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrFormatsC.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td b/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
index 9575866731225e..e14be7dac08eab 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
@@ -20,8 +20,6 @@ class RVInst16<dag outs, dag ins, string opcodestr, string argstr,
   // to build the decode table.
   field bits<16> SoftFail = 0;
   let Size = 2;
-
-  bits<2> Opcode = 0;
 }
 
 class RVInst16CR<bits<4> funct4, bits<2> opcode, dag outs, dag ins,


        


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