[PATCH] D155623: [AArch64][NFC] Expand SLEEF coverage for ReplaceWithVeclib testing

[mgabka via Phabricator via llvm-commits]

mgabka added a comment.

OK then I think we are still missing:

llrint
llround
lrint
nearbyint

as those are defined in libm.

Also in my opinion the commit message should directly reference libm not use "math intrinsics" as abs is also a math operation, but it is not defined in libm



================
Comment at: llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef.ll:186
+
+define <2 x double> @llvm_log10_f64(<2 x double> %in) {
+; CHECK-LABEL: @llvm_log10_f64(
----------------
nit: I think that  log10 should be before log2 if we are aiming to keep alphabetical order


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D155623/new/

https://reviews.llvm.org/D155623