[PATCH] D155622: [X86] Recognize standalone `(1 << nbits) - 1` pattern as bzhi

[Danila Malyutin via Phabricator via llvm-commits]

danilaml added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:3510
+  assert((Node->getOpcode() == ISD::ADD ||
+      Node->getOpcode() == ISD::AND || Node->getOpcode() == ISD::SRL) &&
       "Should be either an and-mask, or right-shift after clearing high bits.");
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goldstein.w.n wrote:
> nit: needs clang format.
I think this part is already clang-formatted. I'll recheck.


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Comment at: llvm/test/CodeGen/X86/extract-lowbits.ll:2948
   ret i64 %masked
 }
 
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goldstein.w.n wrote:
> Can you add a test where `nbits` is masked by vreg width? Just want to make sure those semantics are maintained.
Could elaborate? Which semantics should the test verify?
Do you mean something like `(1 << (nbits & vreg_width)) - 1`?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155622/new/

https://reviews.llvm.org/D155622