[PATCH] D153394: [AArch64][GlobalISel] Legalize <2 x s8> and <4 x s8> for G_BUILD_VECTOR
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 22 22:23:26 PDT 2023
aemerson accepted this revision.
aemerson added a comment.
This revision is now accepted and ready to land.
LGTM with a few nits. Thanks for working on this!
================
Comment at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:945
+ /// Ensure the vector size is at least as wide as Ty by promoting the element.
+ LegalizeRuleSet &promoteVectorEltsToVectorMinSize(unsigned TypeIdx,
+ unsigned VectorSize) {
----------------
Sorry, the name I suggested didn't fit with the rest of the naming scheme. I think `widenVectorEltsToVectorMinSize` is better.
================
Comment at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:953
+ const LLT VecTy = Query.Types[TypeIdx];
+ return VecTy.isVector() && !VecTy.getElementCount().isScalable() &&
+ VecTy.getSizeInBits() < VectorSize;
----------------
`LLT::isScalable()`
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153394/new/
https://reviews.llvm.org/D153394
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