[PATCH] D153394: [AArch64][GlobalISel] Legalize <2 x s8> and <4 x s8> for G_BUILD_VECTOR
Allen zhong via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 22 05:01:21 PDT 2023
Allen marked an inline comment as done.
Allen added inline comments.
================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp:723-729
+ [=](const LegalityQuery &Query) {
+ return Query.Types[0] == v2s16 || Query.Types[0] == v2s8;
+ },
0, s32)
+ .minScalarOrEltIf(
+ [=](const LegalityQuery &Query) { return Query.Types[0] == v4s8; },
+ 0, s16)
----------------
aemerson wrote:
> Now that we're going to do this multiple times, I think it's worth factoring out the logic to make it easier to re-use. The underlying logic is I believe: "vectors must be at least 64 bits wide", right? I think we could make this easier by adding a new action/predicates in LegalizerInfo.h, so that we could do something like:
> ```
> .promoteVectoreEltsToVectorMinSize(0, 64)
> ```
>
> I think there are other places in this file that could also use this new action to simplify the code.
>
> P.S. please attach more context to your diffs (-U9999 works).
thanks for your detail suggestion, apply your comment.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153394/new/
https://reviews.llvm.org/D153394
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