[PATCH] D155910: [RISCV] Support register allocation for GHC when f/d is not specified in the architecture

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 21 09:50:33 PDT 2023

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craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D155910/new/

https://reviews.llvm.org/D155910

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