[PATCH] D156077: [AMDGPU] Perform basic folds on llvm.amdgcn.wave.reduce.umin/umax.
Pravin Jagtap via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 23 22:53:19 PDT 2023
pravinjagtap updated this revision to Diff 543381.
pravinjagtap added a comment.
Formatting
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156077/new/
https://reviews.llvm.org/D156077
Files:
llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Index: llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
===================================================================
--- llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -6194,3 +6194,61 @@
%val = call half @llvm.amdgcn.exp2.f16(half 0xH83ff)
ret half %val
}
+
+; --------------------------------------------------------------------
+; llvm.amdgcn.wave.reduce.umin.i32
+; --------------------------------------------------------------------
+
+declare i32 @llvm.amdgcn.wave.reduce.umin.i32(i32, i32 immarg)
+
+define amdgpu_kernel void @test_constant_fold_wave_reduce_umin_poison(ptr addrspace(1) %out, i32 %in) {
+; CHECK-LABEL: @test_constant_fold_wave_reduce_umin_poison(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret void
+;
+entry:
+ %result = call i32 @llvm.amdgcn.wave.reduce.umin.i32(i32 poison, i32 1)
+ store i32 %result, ptr addrspace(1) %out
+ ret void
+}
+
+define amdgpu_kernel void @test_constant_fold_wave_reduce_umin_const(ptr addrspace(1) %out) {
+; CHECK-LABEL: @test_constant_fold_wave_reduce_umin_const(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i32 123, ptr addrspace(1) [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
+;
+entry:
+ %result = call i32 @llvm.amdgcn.wave.reduce.umin.i32(i32 123, i32 1)
+ store i32 %result, ptr addrspace(1) %out
+ ret void
+}
+
+; --------------------------------------------------------------------
+; llvm.amdgcn.wave.reduce.umin.i32
+; --------------------------------------------------------------------
+
+declare i32 @llvm.amdgcn.wave.reduce.umax.i32(i32, i32 immarg)
+
+define amdgpu_kernel void @test_constant_fold_wave_reduce_umax_poison(ptr addrspace(1) %out, i32 %in) {
+; CHECK-LABEL: @test_constant_fold_wave_reduce_umax_poison(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret void
+;
+entry:
+ %result = call i32 @llvm.amdgcn.wave.reduce.umax.i32(i32 poison, i32 1)
+ store i32 %result, ptr addrspace(1) %out
+ ret void
+}
+
+define amdgpu_kernel void @test_constant_fold_wave_reduce_umax_const(ptr addrspace(1) %out) {
+; CHECK-LABEL: @test_constant_fold_wave_reduce_umax_const(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i32 123, ptr addrspace(1) [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
+;
+entry:
+ %result = call i32 @llvm.amdgcn.wave.reduce.umax.i32(i32 123, i32 1)
+ store i32 %result, ptr addrspace(1) %out
+ ret void
+}
Index: llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -1136,6 +1136,16 @@
break;
}
+ case Intrinsic::amdgcn_wave_reduce_umin:
+ case Intrinsic::amdgcn_wave_reduce_umax: {
+ Value *Src = II.getArgOperand(0);
+
+ // Propagate poison and constant value
+ if (isa<PoisonValue>(Src) || isa<Constant>(Src))
+ return IC.replaceInstUsesWith(II, Src);
+
+ break;
+ }
}
if (const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr =
AMDGPU::getImageDimIntrinsicInfo(II.getIntrinsicID())) {
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