[PATCH] D155502: [RISCV] Do not use F registers if zvfh/f/d is not specified in the architecture

[Yueh-Ting (eop) Chen via Phabricator via llvm-commits]

eopXD added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:15154
+
+  if (LocVT == MVT::f16 && Subtarget.hasStdExtZvfh()) {
     static const MCPhysReg FPR16List[] = {
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craig.topper wrote:
> I think you meant Zfh? But even then you probably mean Zfh || Zfhmin?
Yes indeed, I keep mistaking them. Thank you for correcting me.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155502/new/

https://reviews.llvm.org/D155502