[llvm] be6380f - [RISCV] Remove unused classes VPseudoTernary, VPseudoTernaryNoMaskNoPolicy, and VPseudoConversionW_V
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 18 16:37:54 PDT 2023
Author: Michael Maitland
Date: 2023-07-18T16:37:12-07:00
New Revision: be6380f017ac8272582010bb0aa91380e2aaa58f
URL: https://github.com/llvm/llvm-project/commit/be6380f017ac8272582010bb0aa91380e2aaa58f
DIFF: https://github.com/llvm/llvm-project/commit/be6380f017ac8272582010bb0aa91380e2aaa58f.diff
LOG: [RISCV] Remove unused classes VPseudoTernary, VPseudoTernaryNoMaskNoPolicy, and VPseudoConversionW_V
These classes are dead and can be removed.
Differential Revision: https://reviews.llvm.org/D155634
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index 358300a4d5b0e3..b196653a0dfe68 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -3220,29 +3220,6 @@ multiclass VPseudoVNSHT_WV_WX_WI {
}
}
-multiclass VPseudoTernary<VReg RetClass,
- RegisterClass Op1Class,
- DAGOperand Op2Class,
- LMULInfo MInfo,
- string Constraint = ""> {
- let VLMul = MInfo.value in {
- def "_" # MInfo.MX : VPseudoTernaryNoMask<RetClass, Op1Class, Op2Class, Constraint>;
- def "_" # MInfo.MX # "_MASK" : VPseudoBinaryMask<RetClass, Op1Class, Op2Class, Constraint>;
- }
-}
-
-multiclass VPseudoTernaryNoMaskNoPolicy<VReg RetClass,
- RegisterClass Op1Class,
- DAGOperand Op2Class,
- LMULInfo MInfo,
- string Constraint = ""> {
- let VLMul = MInfo.value in {
- def "_" # MInfo.MX : VPseudoTernaryNoMask<RetClass, Op1Class, Op2Class, Constraint>;
- def "_" # MInfo.MX # "_MASK" : VPseudoBinaryMaskPolicy<RetClass, Op1Class, Op2Class,
- Constraint>;
- }
-}
-
multiclass VPseudoTernaryWithTailPolicy<VReg RetClass,
RegisterClass Op1Class,
DAGOperand Op2Class,
@@ -3808,12 +3785,6 @@ multiclass VPseudoVCVTF_RM_V {
}
}
-multiclass VPseudoConversionW_V {
- defvar constraint = "@earlyclobber $rd";
- foreach m = MxListW in
- defm _V : VPseudoConversion<m.wvrclass, m.vrclass, m, constraint>;
-}
-
multiclass VPseudoVWCVTI_V {
defvar constraint = "@earlyclobber $rd";
foreach m = MxListFW in {
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