[PATCH] D155507: [RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers available

[Yueh-Ting (eop) Chen via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG32c257d384f3: [RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers… (authored by eopXD).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155507/new/

https://reviews.llvm.org/D155507

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll

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