[PATCH] D155622: [X86] Recognize standalone `(1 << nbits) - 1` pattern as bzhi

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:3510
+  assert((Node->getOpcode() == ISD::ADD ||
+      Node->getOpcode() == ISD::AND || Node->getOpcode() == ISD::SRL) &&
       "Should be either an and-mask, or right-shift after clearing high bits.");
----------------
nit: needs clang format.


================
Comment at: llvm/test/CodeGen/X86/extract-lowbits.ll:2948
   ret i64 %masked
 }
 
----------------
Can you add a test where `nbits` is masked by vreg width? Just want to make sure those semantics are maintained.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155622/new/

https://reviews.llvm.org/D155622