[PATCH] D155328: [RISCV] Add a DAG combine for (czero_eq X, (xor Y, 1)) -> (czero_ne X, Y) if Y is 0 or 1.
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 17 13:03:59 PDT 2023
asb added a comment.
I'd started down this route but then took the path of D155288 <https://reviews.llvm.org/D155288> due to the fact this won't catch the RV32 cases. Did you have thoughts on those?
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D155328/new/
https://reviews.llvm.org/D155328
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