[PATCH] D155527: [RISCV] Test for D155140. NFC
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 17 17:10:24 PDT 2023
craig.topper created this revision.
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The vmv1r.v v8, v9 in the last block can be removed by late
copy propagation.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D155527
Files:
llvm/test/CodeGen/RISCV/rvv/copyprop.mir
Index: llvm/test/CodeGen/RISCV/rvv/copyprop.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/RISCV/rvv/copyprop.mir
@@ -0,0 +1,76 @@
+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+# RUN: llc %s -o - -mtriple=riscv64 -mattr=+v -start-after=finalize-isel | FileCheck %s
+
+--- |
+ define void @foo() {
+ ; CHECK-LABEL: foo:
+ ; CHECK: # %bb.0: # %entry
+ ; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma
+ ; CHECK-NEXT: vmsne.vi v0, v8, 0
+ ; CHECK-NEXT: vsll.vi v9, v8, 5
+ ; CHECK-NEXT: vmerge.vim v9, v9, -1, v0
+ ; CHECK-NEXT: csrwi vxrm, 0
+ ; CHECK-NEXT: vssra.vi v8, v8, 2
+ ; CHECK-NEXT: bgeu a0, zero, .LBB0_3
+ ; CHECK-NEXT: # %bb.1: # %entry
+ ; CHECK-NEXT: li a2, 128
+ ; CHECK-NEXT: bltu a0, a2, .LBB0_4
+ ; CHECK-NEXT: .LBB0_2: # %entry
+ ; CHECK-NEXT: vse64.v v8, (a1)
+ ; CHECK-NEXT: ret
+ ; CHECK-NEXT: .LBB0_3:
+ ; CHECK-NEXT: vmv.v.i v8, 0
+ ; CHECK-NEXT: li a2, 128
+ ; CHECK-NEXT: bgeu a0, a2, .LBB0_2
+ ; CHECK-NEXT: .LBB0_4: # %entry
+ ; CHECK-NEXT: vmv1r.v v8, v9
+ ; CHECK-NEXT: vse64.v v8, (a1)
+ ; CHECK-NEXT: ret
+ entry:
+ ret void
+ }
+...
+---
+name: foo
+tracksRegLiveness: true
+liveins:
+ - { reg: '$x10', virtual-reg: '%1' }
+ - { reg: '$x11', virtual-reg: '%2' }
+ - { reg: '$v8', virtual-reg: '%2' }
+body: |
+ bb.0.entry:
+ successors: %bb.1, %bb.2
+ liveins: $x10, $x11, $x12, $v8
+
+ %2:gpr = COPY $x11
+ %1:gpr = COPY $x10
+ %3:vr = COPY $v8
+ %pt5:vr = IMPLICIT_DEF
+ %17:vr = PseudoVSLL_VI_M1 %pt5, %3, 5, 1, 6 /* e64 */, 0
+ %22:vr = PseudoVMSNE_VI_M1 %3, 0, 1, 6 /* e64 */
+ $v0 = COPY %22
+ %26:vrnov0 = IMPLICIT_DEF
+ %25:vrnov0 = PseudoVMERGE_VIM_M1 %26, %17, -1, $v0, 1, 6 /* e64 */
+ %pt8:vr = IMPLICIT_DEF
+ %29:vr = PseudoVSSRA_VI_M1 %pt8, %3, 2, 0, 1, 6 /* e64 */, 0
+ %pt9:vr = IMPLICIT_DEF
+ %30:vr = PseudoVMV_V_I_M1 %pt9, 0, 1, 6 /* e64 */, 0
+ BGEU %1, $x0, %bb.2
+
+ bb.1.entry:
+
+ bb.2.entry:
+ successors: %bb.3, %bb.4
+
+ %31:vr = PHI %30, %bb.0, %29, %bb.1
+ %32:gpr = ADDI $x0, 128
+ BGEU %1, %32, %bb.4
+
+ bb.3.entry:
+
+ bb.4.entry:
+ %33:vr = PHI %31, %bb.2, %25, %bb.3
+ PseudoVSE64_V_M1 killed %33, %2, 1, 6 /* e64 */
+ PseudoRET
+
+...
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