[PATCH] D155426: [AVR][NFC] Merge emitInstruction into encodeInstruction.

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan created this revision.
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Herald added subscribers: Jim, hiraditya, dylanmckay.
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I do this change for 2 reasons.
1, `AVRMCCodeEmitter::emitInstruction` has only one use which is `AVRMCCodeEmitter::encodeInstruction`, and the parameter `STI` is not used in this function. I think it might be copied from other target.
2, We do have `AVRAsmPrinter::emitInstruction`, and it would invoke `AVRMCCodeEmitter::encodeInstruction` in its calling chain, so if we call `AVRMCCodeEmitter::emitInstruction` in `AVRMCCodeEmitter::encodeInstruction`, it would be confusing.
So I think merge these 2 function will be more clear.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D155426

Files:
  llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
  llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.h


Index: llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.h
===================================================================
--- llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.h
+++ llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.h
@@ -95,9 +95,6 @@
                              SmallVectorImpl<MCFixup> &Fixups,
                              const MCSubtargetInfo &STI) const;
 
-  void emitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
-                       SmallVectorImpl<char> &CB) const;
-
   void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
                          SmallVectorImpl<MCFixup> &Fixups,
                          const MCSubtargetInfo &STI) const override;
Index: llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
===================================================================
--- llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
+++ llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
@@ -270,17 +270,6 @@
   return getExprOpValue(MO.getExpr(), Fixups, STI);
 }
 
-void AVRMCCodeEmitter::emitInstruction(uint64_t Val, unsigned Size,
-                                       const MCSubtargetInfo &STI,
-                                       SmallVectorImpl<char> &CB) const {
-  size_t WordCount = Size / 2;
-
-  for (int64_t i = WordCount - 1; i >= 0; --i) {
-    uint16_t Word = (Val >> (i * 16)) & 0xFFFF;
-    support::endian::write(CB, Word, support::endianness::little);
-  }
-}
-
 void AVRMCCodeEmitter::encodeInstruction(const MCInst &MI,
                                          SmallVectorImpl<char> &CB,
                                          SmallVectorImpl<MCFixup> &Fixups,
@@ -293,7 +282,11 @@
   assert(Size > 0 && "Instruction size cannot be zero");
 
   uint64_t BinaryOpCode = getBinaryCodeForInstr(MI, Fixups, STI);
-  emitInstruction(BinaryOpCode, Size, STI, CB);
+
+  for (int64_t i = Size / 2 - 1; i >= 0; --i) {
+    uint16_t Word = (BinaryOpCode >> (i * 16)) & 0xFFFF;
+    support::endian::write(CB, Word, support::endianness::little);
+  }
 }
 
 MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,


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