[llvm] cb11f97 - [X86] Add PBNDKB instruction.

[Freddy Ye via llvm-commits]

Author: Freddy Ye
Date: 2023-07-19T16:15:03+08:00
New Revision: cb11f97eb6ba42352bb1f7cc15a9242f4912aaf2

URL: https://github.com/llvm/llvm-project/commit/cb11f97eb6ba42352bb1f7cc15a9242f4912aaf2
DIFF: https://github.com/llvm/llvm-project/commit/cb11f97eb6ba42352bb1f7cc15a9242f4912aaf2.diff

LOG: [X86] Add PBNDKB instruction.

For more details about this instruction, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D155142

Added: 
    llvm/test/MC/Disassembler/X86/pbndkb.txt
    llvm/test/MC/X86/pbndkb.s

Modified: 
    llvm/docs/ReleaseNotes.rst
    llvm/lib/Target/X86/X86InstrSystem.td
    llvm/test/MC/X86/x86_errors.s

Removed: 
    


################################################################################
diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index fb138d113b09f7..a3ececd10971b3 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -277,6 +277,7 @@ Changes to the X86 Backend
 
 * ``__builtin_unpredictable`` (unpredictable metadata in LLVM IR), is handled by X86 Backend.
   ``X86CmovConversion`` pass now respects this builtin and does not convert CMOVs to branches.
+* Add support for the ``PBNDKB`` instruction.
 
 
 Changes to the OCaml bindings

diff  --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index 69ddc876bbe4ae..0272f7de0f9e4b 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -429,7 +429,8 @@ let Uses = [EAX, ECX, EDX] in
 def WRMSRNS : I<0x01, MRM_C6, (outs), (ins), "wrmsrns", []>, PS;
 let Defs = [EAX, EDX], Uses = [ECX] in
 def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", []>, TB;
-
+let Defs = [RAX, EFLAGS], Uses = [RBX, RCX], Predicates = [In64BitMode] in
+def PBNDKB : I<0x01, MRM_C7, (outs), (ins), "pbndkb", []>, PS;
 let Uses = [RSI, RDI, RCX], Predicates = [In64BitMode] in {
 def WRMSRLIST : I<0x01, MRM_C6, (outs), (ins), "wrmsrlist", []>, XS;
 def RDMSRLIST : I<0x01, MRM_C6, (outs), (ins), "rdmsrlist", []>, XD;

diff  --git a/llvm/test/MC/Disassembler/X86/pbndkb.txt b/llvm/test/MC/Disassembler/X86/pbndkb.txt
new file mode 100644
index 00000000000000..e92269c8b9ecfd
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/pbndkb.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s
+# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s
+
+# CHECK: pbndkb
+0x0f,0x01,0xc7
+

diff  --git a/llvm/test/MC/X86/pbndkb.s b/llvm/test/MC/X86/pbndkb.s
new file mode 100644
index 00000000000000..7c67d676d36119
--- /dev/null
+++ b/llvm/test/MC/X86/pbndkb.s
@@ -0,0 +1,7 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: pbndkb
+// CHECK: encoding: [0x0f,0x01,0xc7]
+          pbndkb
+

diff  --git a/llvm/test/MC/X86/x86_errors.s b/llvm/test/MC/X86/x86_errors.s
index e0a971f18e52db..080a52ec59148d 100644
--- a/llvm/test/MC/X86/x86_errors.s
+++ b/llvm/test/MC/X86/x86_errors.s
@@ -187,3 +187,6 @@ cmpxchg16b (%eax)
 // 32: 12: error: immediate must be an integer in range [0, 15]
 // 64: 12: error: immediate must be an integer in range [0, 15]
 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+
+// 32: error: instruction requires: 64-bit mode
+pbndkb