[PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly

Qi Hu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 21 14:00:14 PDT 2023


Qi-Hu added inline comments.


================
Comment at: llvm/test/CodeGen/X86/inline-asm-assertion.ll:3
+; RUN: not llc -O0 < %s 2>&1 | FileCheck %s
+; CHECK: error: inline assembly requires more registers than available
+
----------------
arsenm wrote:
> arsenm wrote:
> > Qi-Hu wrote:
> > > arsenm wrote:
> > > > bryanpkc wrote:
> > > > > Suggestions:
> > > > > 
> > > > > 1. Add a `CHECK` line to match the output assembly, e.g. `; CHECK: .size main, .Lfunc_end0-main`, to ensure that that the backend does not crash after register allocation.
> > > > > 1. Add a `RUN` line with `llc -O2` to ensure that `RegAllocGreedy` behaves the same way.
> > > > > 
> > > > Could also add -verify-machineinstrs, it may fail already with expensive checks. I was working on fixing verifier errors after regalloc failure but haven't finished it
> > > That's a good point. However, adding `MachineVerifier` reports a fatal error for `llc -O2`: "Bad machine code: Using an undefined physical register".
> > Which is another bug which needs to be fixed
> If it's failing the verifier after this, you should check the verification message. You'll need to handle that to not break EXPENSIVE_CHECKS testing. You can fix the additional verifier error separately though
I don't know how to fix the verifier error at this point, but I agree that it should be handled as a separate issue.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D155087/new/

https://reviews.llvm.org/D155087



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