[llvm] 793a349 - Revert "[AArch64] Fix an immediate out of range for large realignments on Windows"

[Martin Storsjö via llvm-commits]

Author: Martin Storsjö
Date: 2023-07-18T18:21:23+03:00
New Revision: 793a349e6f16888476cd365f7f958652347f4569

URL: https://github.com/llvm/llvm-project/commit/793a349e6f16888476cd365f7f958652347f4569
DIFF: https://github.com/llvm/llvm-project/commit/793a349e6f16888476cd365f7f958652347f4569.diff

LOG: Revert "[AArch64] Fix an immediate out of range for large realignments on Windows"

This reverts commit b1d0bc0f4395c69097bc11b6ba8f821f621272a9.

Builds with expensive checks show that 'sp' isn't a valid register
in ADDXrr - an object file built without exprnsive checks enabled
disassembles as "add x15, xzr, x16", instead of the intended
"add x15, sp, x16".

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    llvm/test/CodeGen/AArch64/win-align-chkstk.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 029b2ea80cac30..f13344a27bf8b3 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -1739,22 +1739,10 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
     NumBytes = 0;
 
     if (RealignmentPadding > 0) {
-      if (RealignmentPadding >= 4096) {
-        BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVi64imm))
-            .addReg(AArch64::X16, RegState::Define)
-            .addImm(RealignmentPadding)
-            .setMIFlags(MachineInstr::FrameSetup);
-        BuildMI(MBB, MBBI, DL, TII->get(AArch64::ADDXrr), AArch64::X15)
-            .addReg(AArch64::SP)
-            .addReg(AArch64::X16, RegState::Kill)
-            .setMIFlag(MachineInstr::FrameSetup);
-      } else {
-        BuildMI(MBB, MBBI, DL, TII->get(AArch64::ADDXri), AArch64::X15)
-            .addReg(AArch64::SP)
-            .addImm(RealignmentPadding)
-            .addImm(0)
-            .setMIFlag(MachineInstr::FrameSetup);
-      }
+      BuildMI(MBB, MBBI, DL, TII->get(AArch64::ADDXri), AArch64::X15)
+          .addReg(AArch64::SP)
+          .addImm(RealignmentPadding)
+          .addImm(0);
 
       uint64_t AndMask = ~(MFI.getMaxAlign().value() - 1);
       BuildMI(MBB, MBBI, DL, TII->get(AArch64::ANDXri), AArch64::SP)

diff  --git a/llvm/test/CodeGen/AArch64/win-align-chkstk.ll b/llvm/test/CodeGen/AArch64/win-align-chkstk.ll
index 5650d781418462..7c1c3dbfaf6dcd 100644
--- a/llvm/test/CodeGen/AArch64/win-align-chkstk.ll
+++ b/llvm/test/CodeGen/AArch64/win-align-chkstk.ll
@@ -25,28 +25,3 @@ declare dso_local void @other(ptr noundef)
 ; CHECK-NEXT: sub sp, sp, x15, lsl #4
 ; CHECK-NEXT: add x15, sp, #16
 ; CHECK-NEXT: and sp, x15, #0xffffffffffffffe0
-
-define dso_local void @func2() {
-entry:
-  %buf = alloca [8192 x i8], align 8192
-  %arraydecay = getelementptr inbounds [8192 x i8], ptr %buf, i64 0, i64 0
-  call void @other(ptr noundef %arraydecay)
-  ret void
-}
-
-; CHECK-LABEL: func2:
-; CHECK-NEXT: .seh_proc func2
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: str x28, [sp, #-32]!
-; CHECK-NEXT: .seh_save_reg_x x28, 32
-; CHECK-NEXT: stp x29, x30, [sp, #8]
-; CHECK-NEXT: .seh_save_fplr 8
-; CHECK-NEXT: add x29, sp, #8
-; CHECK-NEXT: .seh_add_fp 8
-; CHECK-NEXT: .seh_endprologue
-; CHECK-NEXT: mov x15, #1533
-; CHECK-NEXT: bl __chkstk
-; CHECK-NEXT: sub sp, sp, x15, lsl #4
-; CHECK-NEXT: mov x16, #8176
-; CHECK-NEXT: add x15, sp, x16
-; CHECK-NEXT: and sp, x15, #0xffffffffffffe000