[PATCH] D155871: [AArch64] Lower fcvtl2 (fpext) via tablegen patterns.

[Dave Green via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG495bdfc7bb72: [AArch64] Lower fcvtl2 (fpext) via tablegen patterns. (authored by dmgreen).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155871/new/

https://reviews.llvm.org/D155871

Files:
  llvm/include/llvm/Target/GlobalISel/Target.td
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
  llvm/test/CodeGen/AArch64/fpext.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D155871.543313.patch
Type: text/x-patch
Size: 8766 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230723/6b4413a9/attachment.bin>