[llvm] 791c896 - [TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f

[Maciej Gabka via llvm-commits]

Author: Maciej Gabka
Date: 2023-07-21T13:46:03Z
New Revision: 791c89600aaa288d7066aea95a1e06cd6d61b2e3

URL: https://github.com/llvm/llvm-project/commit/791c89600aaa288d7066aea95a1e06cd6d61b2e3
DIFF: https://github.com/llvm/llvm-project/commit/791c89600aaa288d7066aea95a1e06cd6d61b2e3.diff

LOG: [TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f

In the original commit adding SLEEF mappings, https://reviews.llvm.org/D146839
mappings for log2/log2f were missing.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D155623

Added: 
    

Modified: 
    llvm/include/llvm/Analysis/VecFuncs.def
    llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def
index 8fe996f70b069a..b884c1e3911e6b 100644
--- a/llvm/include/llvm/Analysis/VecFuncs.def
+++ b/llvm/include/llvm/Analysis/VecFuncs.def
@@ -652,6 +652,11 @@ TLI_DEFINE_VECFUNC("logf", "_ZGVsMxv_logf", SCALABLE(4), MASKED)
 TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVsMxv_log", SCALABLE(2), MASKED)
 TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVsMxv_logf", SCALABLE(4), MASKED)
 
+TLI_DEFINE_VECFUNC( "log2", "_ZGVsMxv_log2", SCALABLE(2), MASKED)
+TLI_DEFINE_VECFUNC( "log2f", "_ZGVsMxv_log2f", SCALABLE(4), MASKED)
+TLI_DEFINE_VECFUNC( "llvm.log2.f64", "_ZGVsMxv_log2", SCALABLE(2), MASKED)
+TLI_DEFINE_VECFUNC( "llvm.log2.f32", "_ZGVsMxv_log2f", SCALABLE(4), MASKED)
+
 TLI_DEFINE_VECFUNC("log10", "_ZGVsMxv_log10",  SCALABLE(2), MASKED)
 TLI_DEFINE_VECFUNC("log10f", "_ZGVsMxv_log10f", SCALABLE(4), MASKED)
 TLI_DEFINE_VECFUNC("llvm.log10.f64", "_ZGVsMxv_log10", SCALABLE(2), MASKED)

diff  --git a/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
index 0d14eccf79fb3e..d7decd57d0b966 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
@@ -648,8 +648,9 @@ declare float @llvm.log2.f32(float) #0
 
 define void @log2_f64(double* nocapture %varray) {
   ; CHECK-LABEL: @log2_f64(
-  ; CHECK:    [[TMP5:%.*]] = call <2 x double> @_ZGVnN2v_log2(<2 x double> [[TMP4:%.*]])
-  ; CHECK:    ret void
+  ; NEON:    [[TMP5:%.*]] = call <2 x double> @_ZGVnN2v_log2(<2 x double> [[TMP4:%.*]])
+  ; SVE:     [[TMP5:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log2(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
+  ; CHECK:   ret void
   ;
   entry:
   br label %for.body
@@ -671,8 +672,9 @@ define void @log2_f64(double* nocapture %varray) {
 
 define void @log2_f32(float* nocapture %varray) {
   ; CHECK-LABEL: @log2_f32(
-  ; CHECK:    [[TMP5:%.*]] = call <4 x float> @_ZGVnN4v_log2f(<4 x float> [[TMP4:%.*]])
-  ; CHECK:    ret void
+  ; NEON:    [[TMP5:%.*]] = call <4 x float> @_ZGVnN4v_log2f(<4 x float> [[TMP4:%.*]])
+  ; SVE:     [[TMP5:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log2f(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
+  ; CHECK:   ret void
   ;
   entry:
   br label %for.body