[PATCH] D155301: [ARM] Replace TransferImpOps with copyImplicitOps

[John Brawn via Phabricator via llvm-commits]

john.brawn added a comment.

In D155301#4504941 <https://reviews.llvm.org/D155301#4504941>, @dmgreen wrote:

> Looks like a nice cleanup. What happens when implicit uses are added to mulitple instructions? Could there be `implicit killed ` uses that are added in multiple places and would not pass verification?

Writing some MIR to test this it does result in a machine verifier error. However I don't think these instructions will ever have implicit uses. As far as I can tell the only way an instruction can get an implicit use/def (when one isn't in the instruction description) is in VirtRegRewriter when there's a use/def of a sub-register of a super-register. These instructions don't have any register uses, so they can't get any implicit register uses in this way, so there's no problem.


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https://reviews.llvm.org/D155301