[PATCH] D155618: [RISCV] Reduce alignment of vector constant pool entries

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

> Note: I'd originally tried to do something here which was more target independent, but I found that a) reducing alignment caused massive test diffs, and b) exposed what appeared to be a number of missing folds on x86. Thus the target specific hook approach taken here.

SSE arithmetic ops can only fold aligned loads. Is that what you were seeing?


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https://reviews.llvm.org/D155618