[PATCH] D155592: [AArch64] Reuse larger DUPLANE if available

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Thanks. Looks pretty good. Do we need to handle the other "indexing" operations in the same way? For example something like this below, which is for fmul. I would guess that the extending operations (umull) are more likely to see the problem, but you can imagine the others in the "AdvSIMD indexed element" section of AArch64InstrInfo.td might all be better using dup_v8i16 now.

  define <4 x float> @sel.v8i16(ptr %p, ptr %q, <4 x float> %a, <4 x float> %b, <2 x float> %c) {
    %splat = shufflevector <4 x float> %a, <4 x float> poison, <4 x i32> zeroinitializer
    %splat2 = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> zeroinitializer
    
    %r = fmul <4 x float> %b, %splat
    %r2 = fmul <2 x float> %c, %splat2
    store <2 x float> %r2, ptr %p
    ret <4 x float> %r
  }


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