[llvm] 49f3435 - [RISCV] Adjust definition order in RISCVInstrInfoZvk.td to be the same with other td file

Jim Lin via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 23 20:34:52 PDT 2023


Author: Jim Lin
Date: 2023-07-24T11:34:37+08:00
New Revision: 49f3435286418c99dd4080fa427809ad72892127

URL: https://github.com/llvm/llvm-project/commit/49f3435286418c99dd4080fa427809ad72892127
DIFF: https://github.com/llvm/llvm-project/commit/49f3435286418c99dd4080fa427809ad72892127.diff

LOG: [RISCV] Adjust definition order in RISCVInstrInfoZvk.td to be the same with other td file

The definition order is operand/SDNode, instruction class template,
instruction, pseudo instruciton, codegen patterns, ....

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
index de51f63c89aa36..6f15179ff9e697 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
@@ -11,6 +11,56 @@
 //
 //===----------------------------------------------------------------------===//
 
+//===----------------------------------------------------------------------===//
+// Operand and SDNode transformation definitions.
+//===----------------------------------------------------------------------===//
+
+def RnumArg_0_7 : AsmOperandClass {
+  let Name = "RnumArg_0_7";
+  let RenderMethod = "addImmOperands";
+  let DiagnosticType = "InvalidRnumArg_0_7";
+}
+
+def RnumArg_1_10 : AsmOperandClass {
+  let Name = "RnumArg_1_10";
+  let RenderMethod = "addImmOperands";
+  let DiagnosticType = "InvalidRnumArg_1_10";
+}
+
+def RnumArg_2_14 : AsmOperandClass {
+  let Name = "RnumArg_2_14";
+  let RenderMethod = "addImmOperands";
+  let DiagnosticType = "InvalidRnumArg_2_14";
+}
+
+def rnum_0_7 : Operand<XLenVT>, ImmLeaf<XLenVT,
+                                         [{return (0 <= Imm && Imm <= 7);}]> {
+  let ParserMatchClass = RnumArg_0_7;
+  let DecoderMethod = "decodeUImmOperand<5>";
+  let OperandType = "OPERAND_RVKRNUM_0_7";
+  let OperandNamespace = "RISCVOp";
+}
+
+def rnum_1_10 : Operand<XLenVT>, ImmLeaf<XLenVT,
+                                         [{return (1 <= Imm && Imm <= 10);}]> {
+  let ParserMatchClass = RnumArg_1_10;
+  let DecoderMethod = "decodeUImmOperand<5>";
+  let OperandType = "OPERAND_RVKRNUM_1_10";
+  let OperandNamespace = "RISCVOp";
+}
+
+def rnum_2_14 : Operand<XLenVT>, ImmLeaf<XLenVT,
+                                         [{return (2 <= Imm && Imm <= 14);}]> {
+  let ParserMatchClass = RnumArg_2_14;
+  let DecoderMethod = "decodeUImmOperand<5>";
+  let OperandType = "OPERAND_RVKRNUM_2_14";
+  let OperandNamespace = "RISCVOp";
+}
+
+//===----------------------------------------------------------------------===//
+// Instruction class templates
+//===----------------------------------------------------------------------===//
+
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
 multiclass VCLMUL_MV_V_X<string opcodestr, bits<6> funct6> {
   def V  : VALUVV<funct6, OPMVV, opcodestr # "." # "vv">,
@@ -85,47 +135,9 @@ class VAESKF_MV_I<bits<6> funct6, string opcodestr, Operand optype>
 }
 } // hasSideEffects = 0, mayLoad = 0, mayStore = 0
 
-def RnumArg_0_7 : AsmOperandClass {
-  let Name = "RnumArg_0_7";
-  let RenderMethod = "addImmOperands";
-  let DiagnosticType = "InvalidRnumArg_0_7";
-}
-
-def RnumArg_1_10 : AsmOperandClass {
-  let Name = "RnumArg_1_10";
-  let RenderMethod = "addImmOperands";
-  let DiagnosticType = "InvalidRnumArg_1_10";
-}
-
-def RnumArg_2_14 : AsmOperandClass {
-  let Name = "RnumArg_2_14";
-  let RenderMethod = "addImmOperands";
-  let DiagnosticType = "InvalidRnumArg_2_14";
-}
-
-def rnum_0_7 : Operand<XLenVT>, ImmLeaf<XLenVT,
-                                         [{return (0 <= Imm && Imm <= 7);}]> {
-  let ParserMatchClass = RnumArg_0_7;
-  let DecoderMethod = "decodeUImmOperand<5>";
-  let OperandType = "OPERAND_RVKRNUM_0_7";
-  let OperandNamespace = "RISCVOp";
-}
-
-def rnum_1_10 : Operand<XLenVT>, ImmLeaf<XLenVT,
-                                         [{return (1 <= Imm && Imm <= 10);}]> {
-  let ParserMatchClass = RnumArg_1_10;
-  let DecoderMethod = "decodeUImmOperand<5>";
-  let OperandType = "OPERAND_RVKRNUM_1_10";
-  let OperandNamespace = "RISCVOp";
-}
-
-def rnum_2_14 : Operand<XLenVT>, ImmLeaf<XLenVT,
-                                         [{return (2 <= Imm && Imm <= 14);}]> {
-  let ParserMatchClass = RnumArg_2_14;
-  let DecoderMethod = "decodeUImmOperand<5>";
-  let OperandType = "OPERAND_RVKRNUM_2_14";
-  let OperandNamespace = "RISCVOp";
-}
+//===----------------------------------------------------------------------===//
+// Instructions
+//===----------------------------------------------------------------------===//
 
 let Predicates = [HasStdExtZvbb] in {
   defm VANDN_V  : VALU_IV_V_X<"vandn", 0b000001>;


        


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