[PATCH] D155791: [RISCV] Remove unused Opcode field from RVInst16. NFC

[Craig Topper via Phabricator via llvm-commits]

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Unlike RVInst which also has an Opcode field, all of the subclasseso
of RVInst16 assign Inst{1-0} directly.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D155791

Files:
  llvm/lib/Target/RISCV/RISCVInstrFormatsC.td


Index: llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
+++ llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
@@ -20,8 +20,6 @@
   // to build the decode table.
   field bits<16> SoftFail = 0;
   let Size = 2;
-
-  bits<2> Opcode = 0;
 }
 
 class RVInst16CR<bits<4> funct4, bits<2> opcode, dag outs, dag ins,


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