The Week Of Monday 12 June 2023 Archives by author
Starting: Mon Jun 12 00:04:18 PDT 2023
Ending: Sun Jun 18 23:57:52 PDT 2023
Messages: 2698
- [PATCH] D151696: [WIP] Remove CPU_SPECIFIC* MACROs and use unified getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Haohai, Wen via Phabricator via llvm-commits
- [llvm] 582cf31 - Fix the LLVM Sphinx build
Aaron Ballman via llvm-commits
- [PATCH] D152689: [NFC] Remove dead conditionals
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D152689: [NFC] Remove dead conditionals
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D152689: [NFC] Remove dead conditionals
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D150803: [WebAssembly] Add a new `wasm_async` clang attribute for marking async functions.
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D152351: [clang] Add __builtin_isfpclass
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D153163: Add __attribute__((warn_unused_result)) to LLVMErrorRef
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D54290: [libcxx] Provide thread annotations for shared_mutex
Aaron Puchert via Phabricator via llvm-commits
- [PATCH] D151006: [bazel] Remove terminfo dependency
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153150: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153150: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153204: RISCVAsmParser: support comments in more places
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153204: RISCVAsmParser: support comments in more places
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Abel Bernabeu via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
Aditya Nandakumar via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
Aditya Nandakumar via Phabricator via llvm-commits
- [PATCH] D152708: [RFC][Draft] Enable primitive support for Two-Level Line Tables in LLVM
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D152691: [LICM] Sunk instructions with invalid source location.
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D147066: [DWARFLinker][DWARFv5] Add handling of DW_OP_addrx and DW_OP_constx expression operands.
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D118754: [DebugInfo] Always emit `.debug_names` with dwarf 5 for Apple platforms
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D151019: [llvm-exegesis] Refactor FunctionExecutorImpl and create factory
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151020: [llvm-exegesis] Add ability to assign perf counters to specific PID
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151025: [llvm-exegesis] Add support for using memory annotations
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151039: [Docs][llvm-exegesis] Add documentation for memory
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151025: [llvm-exegesis] Add support for using memory annotations
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151039: [Docs][llvm-exegesis] Add documentation for memory
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151025: [llvm-exegesis] Add support for using memory annotations
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151039: [Docs][llvm-exegesis] Add documentation for memory
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151025: [llvm-exegesis] Add support for using memory annotations
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151025: [llvm-exegesis] Add support for using memory annotations
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151039: [Docs][llvm-exegesis] Add documentation for memory
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151025: [llvm-exegesis] Add support for using memory annotations
Aiden Grossman via Phabricator via llvm-commits
- [llvm] 3401a5f - [OpenMP][OMPIRBuilder] Migrate emitOffloadingArrays and EmitNonContiguousDescriptor from Clang
Akash Banerjee via llvm-commits
- [PATCH] D149872: [OpenMP][OMPIRBuilder] Migrate emitOffloadingArrays and EmitNonContiguousDescriptor from Clang
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D149872: [OpenMP][OMPIRBuilder] Migrate emitOffloadingArrays and EmitNonContiguousDescriptor from Clang
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D150860: [OpenMP] Change clang emitTargetDataCalls to use OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D152554: [OpenMP] Migrate deviice code privatization from Clang CodeGen to OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D150860: [OpenMP] Change clang emitTargetDataCalls to use OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D152554: [OpenMP] Migrate deviice code privatization from Clang CodeGen to OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D152554: [OpenMP] Migrate deviice code privatization from Clang CodeGen to OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D150860: [OpenMP] Change clang emitTargetDataCalls to use OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [llvm] dddf66f - [OCaml] Rename link_modules' to link_modules
Alan Hu via llvm-commits
- [PATCH] D138846: MC/DC in LLVM Source-Based Code Coverage: LLVM back-end and compiler-rt
Alan Phipps via Phabricator via llvm-commits
- [PATCH] D138846: MC/DC in LLVM Source-Based Code Coverage: LLVM back-end and compiler-rt
Alan Phipps via Phabricator via llvm-commits
- [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization
Alan Phipps via Phabricator via llvm-commits
- [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization
Alan Phipps via Phabricator via llvm-commits
- [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization
Alan Phipps via Phabricator via llvm-commits
- [llvm] 3d5cf0d - Revert "[InstSimplify] Fold all global variables with initializers"
Alan Zhao via llvm-commits
- [llvm] 222d73f - Revert "[SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND."
Alan Zhao via llvm-commits
- [llvm] 00264ea - Revert "InstSimplify: Require instruction be parented"
Alan Zhao via llvm-commits
- [llvm] d6b4f67 - Revert "Revert "InstSimplify: Require instruction be parented""
Alan Zhao via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Alan Zhao via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.
Alan Zhao via Phabricator via llvm-commits
- [PATCH] D151254: InstSimplify: Require instruction be parented
Alan Zhao via Phabricator via llvm-commits
- [PATCH] D153090: [OCaml] Rename link_modules' to link_modules
Alan via Phabricator via llvm-commits
- [PATCH] D153090: [OCaml] Rename link_modules' to link_modules
Alan via Phabricator via llvm-commits
- [PATCH] D153099: [SPIR-V] Begin removing explicit setRegClass calls
Aleksandr Bezzubikov via Phabricator via llvm-commits
- [PATCH] D153100: [SPIR-V] Remove OpSelect pattern
Aleksandr Bezzubikov via Phabricator via llvm-commits
- [PATCH] D153101: [SPIR-V] Simplify regclasses hierarchy and cleanup regbanks
Aleksandr Bezzubikov via Phabricator via llvm-commits
- [PATCH] D152835: [NFC] Regenerate test checks
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152421: [RISCV] Introduce the concept of DLEN(data path width) into getLMULCost.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152311: [RISCV] Merge RISCVMCInstLower.cpp into RISCVAsmPrinter.cpp.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152602: [RISCV] Don't use (ADD (SLLI C, 32), C) to materialize constants when optimizing for size.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152627: [RISCV] Change the immediate argument to Zvk intrinsics/builtins to i8.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152308: [RISCV] Prevent overflowing the small size of InstSeq in generateInstSeq.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152723: [RISCV] Add support for llvm.prefetch to use Zicbop instructions.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152680: [RISCV][NFC] Improve encoding/decoding tests for Zbb instructions
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152627: [RISCV] Change the immediate argument to Zk* intrinsics/builtins from i8 to i32.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152890: [RISCV] Reduce the number of ExtInfo_rr permutations in tablegen.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152894: [RISCV][MC] Fix encoding for vfwmaccbf16
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151284: [RISCV] Custom lower FP_TO_FP16 and FP16_TO_FP to correct ABI of of libcall
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D149248: [RISCV][MC] MC layer support for the experimental zacas extension
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151663: [RISCV] Implement support for bf16 truncate/extend on hard FP targets
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.
Alex Bradbury via Phabricator via llvm-commits
- [llvm] 0356cee - [DebugInfo] Change DWARFDebugAbbrev initialization
Alex Langford via llvm-commits
- [llvm] fecabf4 - [DebugInfo][NFCI] Follow-up to 0356ceedf2e9
Alex Langford via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Alex Langford via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Alex Langford via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Alex Langford via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Alex Langford via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Alex Langford via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Alex Langford via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Alex Langford via Phabricator via llvm-commits
- [llvm] 5039d36 - [Support] Remove TaskQueue
Alexandre Ganea via llvm-commits
- [lld] adcdc9c - [LLD][COFF] Allow overwriting directives exports with cmd-line exports
Alexandre Ganea via llvm-commits
- [lld] 2700da5 - [LLD] Allow usage of LLD as a library
Alexandre Ganea via llvm-commits
- [PATCH] D86338: Remove TaskQueue
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D86338: Remove TaskQueue
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D86338: Remove TaskQueue
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D149611: [LLD][COFF] Allow overwriting directives exports with cmd-line exports
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D149611: [LLD][COFF] Allow overwriting directives exports with cmd-line exports
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D145819: [FuncSpec] Increase the maximum number of times the specializer can run.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D152556: [FuncSpec] Promote stack values before specialization
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D152799: [FuncSpec] Promote stack values before specialization
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D152799: [FuncSpec] Promote stack values before specialization
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D145819: [FuncSpec] Increase the maximum number of times the specializer can run.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D153036: [FuncSpec] Add Freeze and CallBase to the InstCostVisitor.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D153036: [FuncSpec] Add Freeze and CallBase to the InstCostVisitor.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D153036: [FuncSpec] Add Freeze and CallBase to the InstCostVisitor.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D153230: [FuncSpec][NFC] Improve the unittest coverage.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D151361: [CUDA] bump supported CUDA version to 12.1/11.8
Alexey Bader via Phabricator via llvm-commits
- [PATCH] D151361: [CUDA] bump supported CUDA version to 12.1/11.8
Alexey Bader via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include debug instructions in ScheduleRegionSize
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D152705: [test][SLPVectorizer] Precommit testcase showing debug info affects codegen
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D152750: [RISCV] Enable SLP by default (when vectors are available)
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include debug instructions in ScheduleRegionSize
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D152868: [SLP][NFC] Precommit test that exposes a bug in ShuffleBuilder.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D152871: [SLP] Fixes bug in ShuffleBuilder when duplicate entry already exists.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include debug instructions in ScheduleRegionSize
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include isAssumeLikeIntrinsics in ScheduleRegionSize
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D150276: [llvm-objcopy] -O binary: do not align physical addresses
Alexey Karyakin via Phabricator via llvm-commits
- [PATCH] D150276: [llvm-objcopy] -O binary: do not align physical addresses
Alexey Karyakin via Phabricator via llvm-commits
- [PATCH] D150287: [Hexagon] Flip subreg bit for reverse pairs hvx .new
Alexey Karyakin via Phabricator via llvm-commits
- [llvm] e897384 - [DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.
Alexey Lapshin via llvm-commits
- [llvm] f8e67c4 - Revert "[DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location."
Alexey Lapshin via llvm-commits
- [llvm] f9f92f1 - [DWARFLinker][Reland] Handle DW_OP_GNU_push_tls_address while check for variable location.
Alexey Lapshin via llvm-commits
- [PATCH] D147066: [DWARFLinker][DWARFv5] Add handling of DW_OP_addrx and DW_OP_constx expression operands.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D153010: [DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D153010: [DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D153010: [DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D153010: [DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D147066: [DWARFLinker][DWARFv5] Add handling of DW_OP_addrx and DW_OP_constx expression operands.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Alina Sbirlea via Phabricator via llvm-commits
- [PATCH] D152859: [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Alina Sbirlea via Phabricator via llvm-commits
- [PATCH] D152859: [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Alina Sbirlea via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Allen zhong via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Allen zhong via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Allen zhong via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Allen zhong via Phabricator via llvm-commits
- [PATCH] D152815: [test] Update the checking base for LE and BE
Allen zhong via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Allen zhong via Phabricator via llvm-commits
- [PATCH] D152815: [test] Update the checking base for LE and BE
Allen zhong via Phabricator via llvm-commits
- [PATCH] D152815: [test] Update the checking base for LE and BE
Allen zhong via Phabricator via llvm-commits
- [PATCH] D152815: [test] Update the checking base for LE and BE
Allen zhong via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Allen zhong via Phabricator via llvm-commits
- [PATCH] D152815: [test] Update the checking base for LE and BE
Allen zhong via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Allen zhong via Phabricator via llvm-commits
- [PATCH] D152523: [LV] Add cost model for simd vector select instructions of type float
Allen zhong via Phabricator via llvm-commits
- [llvm] f79b033 - [DAGCombiner] Fix crash when trying to replace an indexed store with a narrow store.
Amara Emerson via llvm-commits
- [PATCH] D151911: [LVI] Handle icmp of ashr.
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D152978: [DAGCombiner] Fix crash when trying to replace an indexed store with a narrow store.
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D152978: [DAGCombiner] Fix crash when trying to replace an indexed store with a narrow store.
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D151916: [DAG] Peek through any trunc/zext when combining select into shifts.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D151916: [DAG] Peek through any trunc/zext when combining select into shifts.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D151916: [DAG] Peek through trunc when combining select into shifts.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D152928: [RFX][DAG] Initially add nodes in the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D152928: [RFC][DAG] Initially add nodes in the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D152928: [RFC][DAG] Initially add nodes in the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [llvm] a70d5e2 - [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Amaury Séchet via llvm-commits
- [llvm] e559f27 - [NFC] Add tests cases for isTruncateOf for D151916
Amaury Séchet via llvm-commits
- [llvm] b3bdfd3 - [NFC] Regen CodeGen/AArch64/bitfield-insert.ll
Amaury Séchet via llvm-commits
- [llvm] 61f9cb0 - [NFC] Regenerate several VE codegen tests.
Amaury Séchet via llvm-commits
- [llvm] 2c83809 - [NFC] Automatically generate arm64-dagcombiner-dead-indexed-load.ll
Amaury Séchet via llvm-commits
- [llvm] 552ee85 - [NFC] Regenerate CodeGen/AArch64/sve-streaming-mode-fixed-length-*.ll
Amaury Séchet via llvm-commits
- [llvm] 0dab862 - [NFC] Autogenerate a couple of AArch64 tests.
Amaury Séchet via llvm-commits
- [llvm] a03bcc2 - [NFC] Autogenerate CodeGen/AArch64/sve-vl-arith.ll
Amaury Séchet via llvm-commits
- [llvm] de0707a - [NFC] Autogenerate several AArch64 tests.
Amaury Séchet via llvm-commits
- [llvm] c67a326 - [NFC] Autogenerate several AArch64 tests.
Amaury Séchet via llvm-commits
- [llvm] 7a50e78 - [NFC] Autogenerate various Thumb2 tests.
Amaury Séchet via llvm-commits
- [llvm] 0a76f7d - [NFC] Autogenerate numerous SystemZ tests
Amaury Séchet via llvm-commits
- [llvm] e879fde - [NFC] Autogenerate several Mips test.
Amaury Séchet via llvm-commits
- [llvm] 015323f - [NFC] Autogenerate CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll
Amaury Séchet via llvm-commits
- [llvm] ec77747 - [NFC] Autogenerate CodeGen/ARM/sub-cmp-peephole.ll
Amaury Séchet via llvm-commits
- [llvm] c8f4ba3 - [NFC] Autogenerate CodeGen/ARM/vlddup.ll
Amaury Séchet via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [PATCH] D152662: [BOLT][NFC] Const-ify getDynamicRelocationAt
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152631: [BOLT] Fix handling of code references from unmodified code
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152631: [BOLT] Fix handling of code references from unmodified code
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152731: [BOLT] Sort BranchData in DataAggregator
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152733: [BOLT] Sort CallSiteInfo targets by symbol name in YAMLWriter
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152748: [BOLT] Check dynamic relocations in analyzeJumpTable
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152217: [profi][NFC] Refactor SampleProfileInference::apply
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152944: [BOLT] Mark sections read-only based on PT_GNU_RELRO segment
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152944: [BOLT] Mark sections read-only based on PT_GNU_RELRO segment
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D153063: [BOLT] Check if the symbol is not weak in simplify-rodata-loads
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152731: [BOLT] Sort BranchData in DataAggregator
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152733: [BOLT] Sort CallSiteInfo targets by symbol name in YAMLWriter
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152944: [BOLT] Mark sections read-only based on PT_GNU_RELRO segment
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152944: [BOLT] Mark sections read-only based on PT_GNU_RELRO segment
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152748: [BOLT] Check dynamic relocations in analyzeJumpTable
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152944: [BOLT] Set IsRelro section attribute based on PT_GNU_RELRO segment
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D152944: [BOLT] Set IsRelro section attribute based on PT_GNU_RELRO segment
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D152669: [AIX][TLS] Generate 32-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D150367: [AIX][TLS] Generate optimized local-exec access code sequence using X-Form loads/stores
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D152669: [AIX][TLS] Generate 32-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D151335: [AIX][TLS] Generate .extern and .ref references to __tls_get_addr for local-exec accesses.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D152669: [AIX][TLS] Generate 32-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D152669: [AIX][TLS] Generate 32-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D150367: [AIX][TLS] Generate optimized local-exec access code sequence using X-Form loads/stores
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D152911: [PowerPC] Remove extend between shift and and
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D153034: [PowerPC][Future] Enable __builtin_mma_xxm[t|f]acc on future isa
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D152669: [AIX][TLS] Generate 32-bit local-exec access code sequence
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D150367: [AIX][TLS] Generate optimized local-exec access code sequence using X-Form loads/stores
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D151335: [AIX][TLS] Generate .extern and .ref references to __tls_get_addr for local-exec accesses.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D150276: [llvm-objcopy] -O binary: do not align physical addresses
Ana Pazos via Phabricator via llvm-commits
- [PATCH] D152620: [IR] Define llvm.ptrauth wrapper globals
Anatoly Trosinenko via Phabricator via llvm-commits
- [PATCH] D151802: [ELF] Refine warning condition for memory region assignment for non-allocatable section
Andreu Carminati via Phabricator via llvm-commits
- [PATCH] D152170: [ELF] Fix early overflow check in finalizeAddressDependentContent
Andreu Carminati via Phabricator via llvm-commits
- [PATCH] D152885: [lld] Make lit files relocatable
Andrew Ng via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Andrzej Warzynski via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Andrzej Warzynski via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Andrzej Warzynski via Phabricator via llvm-commits
- [llvm] b2195bc - [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Anna Thomas via llvm-commits
- [llvm] 26bfbec - [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via llvm-commits
- [PATCH] D152718: [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152718: [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152718: [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152718: [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152718: [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152639: [LoopUnrollRuntime] Allow simple transition to deopt non-latch exit blocks
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152358: [CGP] Remove operand of llvm.assume more aggressively.
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152639: [LoopUnrollRuntime] Allow simple transition to deopt non-latch exit blocks
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D151482: [LV] Add support for minimum/maximum intrinsics
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D151482: [LV] Add support for minimum/maximum intrinsics
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152639: [LoopUnrollRuntime] Allow simple transition to deopt non-latch exit blocks
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D152358: [CGP] Remove operand of llvm.assume more aggressively.
Anna Thomas via Phabricator via llvm-commits
- [llvm] 17b7df3 - [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D152620: [IR] Define llvm.ptrauth wrapper globals
Anton Korobeynikov via Phabricator via llvm-commits
- [PATCH] D152684: [ConstraintElimination] Handle non-equality predicates
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D152684: [ConstraintElimination] Handle non-equality predicates
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D152684: [ConstraintElimination] Handle solving-only non-equality predicates
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D152684: [ConstraintElimination] Handle solving-only non-equality predicates
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D151799: [ConstraintElim] Try to use first cmp to prove second cmp for ANDs.
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D151799: [ConstraintElim] Try to use first cmp to prove second cmp for ANDs.
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D151799: [ConstraintElim] Try to use first cmp to prove second cmp for ANDs.
Antonio Frighetto via Phabricator via llvm-commits
- [llvm] eb4f0d9 - Revert "[NVPTX] Allow using v4i32 for memcpy lowering."
Artem Belevich via llvm-commits
- [llvm] d028188 - [CUDA] Updated CUDA versions mentioned in CompileCudaWithLLVM.rst
Artem Belevich via llvm-commits
- [PATCH] D152700: TargetTransformInfo: Add addrspacesMayAlias
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D152701: LowerMemIntrinsics: Check address space aliasing for memmove expansion
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D144911: adding bf16 support to NVPTX
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D152789: NVPTX: Lower unreachable to exit to allow ptxas to accurately reconstruct the CFG.
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D144911: adding bf16 support to NVPTX
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D152317: [NVPTX] Allow using v4i32 for memcpy lowering.
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D144911: adding bf16 support to NVPTX
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D151361: [CUDA] bump supported CUDA version to 12.1/11.8
Artem Belevich via Phabricator via llvm-commits
- [llvm] eb3d21b - [Passes] Remove some legacy printer passes
Arthur Eubanks via llvm-commits
- [llvm] 405f914 - [SimplifyCFG] Check optforfuzzing attribute during in the pass implementation
Arthur Eubanks via llvm-commits
- [llvm] 278d65b - [SimplifyCFG] Add textual pass params for FoldTwoEntryPHINode and SimplifyCondBranch
Arthur Eubanks via llvm-commits
- [llvm] 464dcab - Revert "ValueTracking: Fix nan result handling for fmul"
Arthur Eubanks via llvm-commits
- [llvm] 935c8b6 - Revert "InstSimplify: Remove null parent checks"
Arthur Eubanks via llvm-commits
- [llvm] 0c03f48 - Revert "InstSimplify: Require instruction be parented"
Arthur Eubanks via llvm-commits
- [llvm] 3e39cfe - Revert "Revert "InstSimplify: Require instruction be parented""
Arthur Eubanks via llvm-commits
- [llvm] d202bc7 - Revert "Revert "InstSimplify: Remove null parent checks""
Arthur Eubanks via llvm-commits
- [llvm] f4f826b - Revert "Revert "ValueTracking: Fix nan result handling for fmul""
Arthur Eubanks via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152744: [DSE] Don't eagerly optimize MemorySSA uses
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152744: [DSE] Don't eagerly optimize MemorySSA uses
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152744: [DSE] Don't eagerly optimize MemorySSA uses
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152744: [DSE] Don't eagerly optimize MemorySSA uses
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D149209: [StructuralHash] Track global variables
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152859: [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152859: [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152859: [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152859: [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D145210: [Pipeline] Adjust PostOrderFunctionAttrs placement in simplification pipeline
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D145210: [Pipeline] Adjust PostOrderFunctionAttrs placement in simplification pipeline
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151254: InstSimplify: Require instruction be parented
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152401: CGExprCXX: emit family and allockind attributes
Augie Fackler via Phabricator via llvm-commits
- [PATCH] D147783: [VPlan] Add stride->constant VPlan mapping at construction.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D152576: [LV] Avoid vectorization if wrap predicates are always false.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D152659: [LV] Add IRBuilder folder to simplify GEP x, 0.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D152660: [LV] Fold Add/Mul with neutral elements.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D150609: [AMDGPU] Do not assume stack size for PAL code object indirect calls
Baptiste Saleil via Phabricator via llvm-commits
- [PATCH] D150609: [AMDGPU] Do not assume stack size for PAL code object indirect calls
Baptiste Saleil via Phabricator via llvm-commits
- [PATCH] D152881: [lld][ELF] Add initial support of target CSKY
Ben Shi via Phabricator via llvm-commits
- [PATCH] D152881: [lld][ELF] Add initial support of target CSKY
Ben Shi via Phabricator via llvm-commits
- [PATCH] D153105: [CSKY][NFC][test] Add more tests of multiplication with immediates
Ben Shi via Phabricator via llvm-commits
- [PATCH] D153106: [CSKY] Optimize multiplication with immediates
Ben Shi via Phabricator via llvm-commits
- [PATCH] D153106: [CSKY] Optimize multiplication with immediates
Ben Shi via Phabricator via llvm-commits
- [PATCH] D153106: [CSKY] Optimize multiplication with immediates
Ben Shi via Phabricator via llvm-commits
- [PATCH] D153185: [C API]: Add getters for inline assembly template string, constraints, and flags
Benji Smith via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Benoit Jacob via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Benoit Jacob via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Benoit Jacob via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Benoit Jacob via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Benoit Jacob via Phabricator via llvm-commits
- [PATCH] D152819: [X86][AMX] Let Store not be removed if combineCastStore failed
Bing Yu via Phabricator via llvm-commits
- [PATCH] D152819: [X86][AMX] Let Store not be removed if combineCastStore failed
Bing Yu via Phabricator via llvm-commits
- [PATCH] D124378: [X86][AMX] combine tile cast and load/store instruction.
Bing Yu via Phabricator via llvm-commits
- [PATCH] D153002: [X86][AMX] set Stride to Tile's Col when doing combine amxcast and store into tilestore: %tile = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 32, i8* %src_ptr, i64 64) %vec = call <256 x i8> @llvm.x86.cast.tile.to.vector.v256i8(x86_amx...
Bing Yu via Phabricator via llvm-commits
- [PATCH] D124378: [X86][AMX] combine tile cast and load/store instruction.
Bing Yu via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
Bing Yu via Phabricator via llvm-commits
- [llvm] c7cbf56 - Revert "[CodeGen] Disable default copy ctor and copy assignment operator for class Array"
Bing1 Yu via llvm-commits
- [llvm] 06ef0a3 - [Support/ELF] - Add OpenBSD PT_OPENBSD_NOBTCFI constant.
Brad Smith via llvm-commits
- [PATCH] D150803: [WebAssembly] Add a new `wasm_async` clang attribute for marking async functions.
Brendan Dahl via Phabricator via llvm-commits
- [PATCH] D150803: Add a new `wasm_custom` clang attribute for marking functions.
Brendan Dahl via Phabricator via llvm-commits
- [PATCH] D150803: Add a new `wasm_custom` clang attribute for marking functions.
Brendan Dahl via Phabricator via llvm-commits
- [PATCH] D150803: Add a new `wasm_custom` clang attribute for marking functions.
Brendan Dahl via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Brian Sumner via Phabricator via llvm-commits
- [llvm] 936c16a - [AMDGPU] Pre-commit test for D152892 (NFC)
Carl Ritson via llvm-commits
- [llvm] d0c0838 - [AMDGPU] Remove return VGPRs from callee save list
Carl Ritson via llvm-commits
- [llvm] 0fd31b2 - [AMDGPU] Place returns on stack if they would violate VGPR limit
Carl Ritson via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D152912: [AMDGPU] Place returns on stack if they would violate VGPR limit
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D152912: [AMDGPU] Place returns on stack if they would violate VGPR limit
Carl Ritson via Phabricator via llvm-commits
- [llvm] c0a986a - [LICM] Sunk instructions with invalid source location.
Carlos Alberto Enciso via llvm-commits
- [PATCH] D152691: [LICM] Sunk instructions with invalid source location.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D152691: [LICM] Sunk instructions with invalid source location.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D152691: [LICM] Sunk instructions with invalid source location.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D152691: [LICM] Sunk instructions with invalid source location.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D152691: [LICM] Sunk instructions with invalid source location.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D129818: AMDGPU: Make default AMDHSA Code Object Version to be 5
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D129818: AMDGPU: Make default AMDHSA Code Object Version to be 5
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D129818: AMDGPU: Make default AMDHSA Code Object Version to be 5
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D129818: AMDGPU: Make default AMDHSA Code Object Version to be 5
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D145210: [Pipeline] Adjust PostOrderFunctionAttrs placement in simplification pipeline
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D145210: [Pipeline] Adjust PostOrderFunctionAttrs placement in simplification pipeline
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D145210: [Pipeline] Adjust PostOrderFunctionAttrs placement in simplification pipeline
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D152777: [XCOFF] FixupOffsetInCsect should be 0 for R_REF relocation.
ChenZheng via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
ChenZheng via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
ChenZheng via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
ChenZheng via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
ChenZheng via Phabricator via llvm-commits
- [compiler-rt] bd96d7b - [scudo] Fix bound checks in MemMap and ReservedMemory methods
Chia-hung Duan via llvm-commits
- [compiler-rt] 163f8e1 - Revert "[scudo] Temporariy dispatch region from `RegionBeg`"
Chia-hung Duan via llvm-commits
- [compiler-rt] 5beaa73 - [scudo] Group poppedBlocks/pushedBlocks into BlocksInfo (NFC)
Chia-hung Duan via llvm-commits
- [compiler-rt] 29aa587 - [scudo] Group MappedUser/AllocatedUser into PagesInfo (NFC)
Chia-hung Duan via llvm-commits
- [PATCH] D150511: [llvm] Fix include guards
Chris Lattner via Phabricator via llvm-commits
- [compiler-rt] c981f0b - [scudo] Check support for pvalloc/valloc tests.
Christopher Ferris via llvm-commits
- [compiler-rt] 5e691a1 - [scudo] Fix MallocIterateBoundary on 32 bit.
Christopher Ferris via llvm-commits
- [compiler-rt] 6ee594b - Revert "[scudo] Fix MallocIterateBoundary on 32 bit."
Christopher Ferris via llvm-commits
- [compiler-rt] 261d9e5 - [scudo] Fix MallocIterateBoundary test on 32 bit Android.
Christopher Ferris via llvm-commits
- [compiler-rt] f95a4a2 - [scudo] Disable new/delete mismatch tests on Android.
Christopher Ferris via llvm-commits
- [compiler-rt] 5759e3c - [scudo] Add mallopt to print stats to the log.
Christopher Ferris via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D153007: [AMDGPU] Switch to the new cl option amdgpu-atomic-optimizer-strategy.
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D153007: [AMDGPU] Switch to the new cl option amdgpu-atomic-optimizer-strategy.
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D153036: [FuncSpec] Add Freeze and CallBase to the InstCostVisitor.
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151025: [llvm-exegesis] Add support for using memory annotations
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present
Corbin Robeck via Phabricator via llvm-commits
- [llvm] 11e5a0d - [RISCV] Merge RISCVMCInstLower.cpp into RISCVAsmPrinter.cpp.
Craig Topper via llvm-commits
- [llvm] b418482 - [RISCV] Don't use (ADD (SLLI C, 32), C) to materialize constants when optimizing for size.
Craig Topper via llvm-commits
- [llvm] 17e2d07 - [RISCV] Use tail undisturbed vmv.v.v instead of vslideup.vi vN, vM, 0 for subvector insertion
Craig Topper via llvm-commits
- [llvm] c5fdab3 - [RISCV] Use tail undisturbed vmv.v.v instead of vadd.vi with 0 for vp.merge with all ones mask.
Craig Topper via llvm-commits
- [llvm] d170eff - [RISCV] Begin removing hasDummyMask.
Craig Topper via llvm-commits
- [llvm] 6b8850f - [RISCV] Remove HasDummyMask from tablegen files.
Craig Topper via llvm-commits
- [llvm] b41e0fb - [RISCV] Prevent overflowing the small size of InstSeq in generateInstSeq.
Craig Topper via llvm-commits
- [llvm] c5a88fe - [RISC-V] Zvk update to 0.9.7, Zvknc/Zvksc
Craig Topper via llvm-commits
- [llvm] 445ec58 - [RISCV] Add support for llvm.prefetch to use Zicbop instructions.
Craig Topper via llvm-commits
- [llvm] 2f2af2d - [RISCV] Change the immediate argument to Zk* intrinsics/builtins from i8 to i32.
Craig Topper via llvm-commits
- [llvm] 894d047 - [RISCV] Remove RISCVII::hasMergeOp. NFC
Craig Topper via llvm-commits
- [llvm] a5cd198 - [SelectionDAG] Don't allow type legalization to create noop VP_TRUNCATE.
Craig Topper via llvm-commits
- [llvm] 6ac2ce7 - [RISCV] Introduce the concept of DLEN(data path width) into getLMULCost.
Craig Topper via llvm-commits
- [llvm] f9d0bf0 - Revert "[RISCV] Fold binary op into select if profitable."
Craig Topper via llvm-commits
- [llvm] fcc9fa5 - [RISCV] Reduce the number of ExtInfo_rr permutations in tablegen.
Craig Topper via llvm-commits
- [llvm] 6bf79fb - [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.
Craig Topper via llvm-commits
- [llvm] d60c64d - [RISCV] Remove fcvt.d.l(u) and fcvt.l(u).d instructions with _IN32X suffix.
Craig Topper via llvm-commits
- [llvm] 7163539 - [DAGCombiner] When combining (sext_inreg (zext X), VT) -> (sext X) don't pass along the sext_inreg VT.
Craig Topper via llvm-commits
- [llvm] eea865b - Recommit "[SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND."
Craig Topper via llvm-commits
- [llvm] 354530f - [RISCV] Prevent vsetvli insertion from deleting some vsetvli instructions
Craig Topper via llvm-commits
- [llvm] be37d17 - [RISCV] Fix spelling Compess->Compress. Fix 80 columns. NFC
Craig Topper via llvm-commits
- [llvm] 8a40316 - [RISCV] Treat __riscv_vsetvl_*(-1) as vlmax.
Craig Topper via llvm-commits
- [llvm] 95d3fd9 - [RISCV] Refactor how we create separate instructions for F and Zfinx. NFC
Craig Topper via llvm-commits
- [PATCH] D152723: [RISCV] Add support for llvm.prefetch to use Zicbop instructions.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152311: [RISCV] Merge RISCVMCInstLower.cpp into RISCVAsmPrinter.cpp.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152421: [RISCV] Introduce the concept of DLEN(data path width) into getLMULCost.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152602: [RISCV] Don't use (ADD (SLLI C, 32), C) to materialize constants when optimizing for size.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152565: [RISCV] Use tail undisturbed vmv.v.v instead of vslideup.vi vN, vM, 0 for subvector insertion
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152553: [RISCV] Use tail undisturbed vmv.v.v instead of vadd.vi with 0 for vp.merge with all ones mask.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152308: [RISCV] Prevent overflowing the small size of InstSeq in generateInstSeq.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152050: [RISCV] Begin removing hasDummyMask.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152308: [RISCV] Prevent overflowing the small size of InstSeq in generateInstSeq.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152050: [RISCV] Begin removing hasDummyMask.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152218: [RISCV] Remove HasDummyMask from tablegen files.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152313: [RISCV] Remove RISCVII::hasMergeOp. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152313: [RISCV] Remove RISCVII::hasMergeOp. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152313: [RISCV] Remove RISCVII::hasMergeOp. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152754: [PowerPC] Correct missue of getOperandConstraint in PPCInstrInfo::commuteInstructionImpl
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152308: [RISCV] Prevent overflowing the small size of InstSeq in generateInstSeq.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152117: [RISC-V] Zvk update to 0.9.7, Zvknc/Zvksc
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152421: [RISCV] Introduce the concept of DLEN(data path width) into getLMULCost.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152776: [LibCallsShrinkWrap] Set IsFPConstrained is true for creating quiet floating comparision
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152723: [RISCV] Add support for llvm.prefetch to use Zicbop instructions.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152627: [RISCV] Change the immediate argument to Zk* intrinsics/builtins from i8 to i32.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152313: [RISCV] Remove RISCVII::hasMergeOp. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151850: [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerOp support for VP_SIGN/ZERO_EXTEND.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152380: [RISCV] Canonicalize towards vmerge w/passthrough representation
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152380: [RISCV] Canonicalize towards vmerge w/passthrough representation
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152740: [RISCV] Canonicalize towards vid w/passthrough representation
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152740: [RISCV] Canonicalize towards vid w/passthrough representation
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152421: [RISCV] Introduce the concept of DLEN(data path width) into getLMULCost.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerOp support for VP_SIGN/ZERO_EXTEND.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152147: [RISCV] Fold binary op into select if profitable.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152147: [RISCV] Fold binary op into select if profitable.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152890: [RISCV] Reduce the number of ExtInfo_rr permutations in tablegen.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152890: [RISCV] Reduce the number of ExtInfo_rr permutations in tablegen.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152948: [RISCV] How we create separate instructions for F and Zfinx. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152948: [RISCV] Refactor how we create separate instructions for F and Zfinx. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152948: [RISCV] Refactor how we create separate instructions for F and Zfinx. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152950: [RISCV] Remove fcvt.d.l(u) and fcvt.l(u).d instructions with _IN32X suffix.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152952: [RISCV] Remove fcvt.d.l(u) and fcvt.l(u).d instructions with _IN32X suffix.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152954: [RISCV] Treat __riscv_vsetvl_*(-1) as vlmax.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152960: [RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152147: [RISCV] Fold binary op into select if profitable.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152952: [RISCV] Remove fcvt.d.l(u) and fcvt.l(u).d instructions with _IN32X suffix.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152950: [RISCV] Remove fcvt.d.l(u) and fcvt.l(u).d instructions with _IN32X suffix.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152948: [RISCV] Refactor how we create separate instructions for F and Zfinx. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153044: [RISCV] Removed the requirement of XLenVT for performSELECTCombine
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153011: [RISCV] Add TU variants to VPseudoBinaryM. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152879: [1/2][RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152889: [2/2][RISCV] Model vxrm control for vsadd, vsaddu, vssub, and vssubu
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152889: [2/2][RISCV] Model vxrm control for vsadd, vsaddu, vssub, and vssubu
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153076: [RISCV] Prevent vsetvli insertion from deleting some vsetvli instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153076: [RISCV] Prevent vsetvli insertion from deleting some vsetvli instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153087: [RISCV] Remove math from vrgatherei16 in lowerVECTOR_INTERLEAVE.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152128: [RISCV] Fold special case (xor (setcc constant, y, setlt), 1) -> (setcc y, constant + 1, setlt)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153095: [RISCV][NFC] Simplify code.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152993: [VP][RISCV] Add vp..is.fpclass and RISC-V support
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153095: [RISCV][NFC] Simplify code.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151850: [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153110: [RISCV] Use GPR register class for RV64 ZDInx. Remove GPRF64 register class.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152954: [RISCV] Treat __riscv_vsetvl_*(-1) as vlmax.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152128: [RISCV] Fold special case (xor (setcc constant, y, setlt), 1) -> (setcc y, constant + 1, setlt)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153112: [RISCV] Match shl (ext v, splat 1) to vector widening add.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153159: [RISCV] Add errors for mixing Zcmp with C/Zcd and D.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152948: [RISCV] Refactor how we create separate instructions for F and Zfinx. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152894: [RISCV][MC] Fix encoding for vfwmaccbf16
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153067: [RISCV] Add a policy operand to VPseudoBinaryNoMaskTU [NFC]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153161: [RISCV] Move Zca/Zcb/Zcd/Zcf/Zcmp/Zcmt out of experimental status.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153170: [RISCV] Sort the extensions in SupportedExtensions and SupportedExperimentalExtensions.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for XCVmac extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151663: [RISCV] Implement support for bf16 truncate/extend on hard FP targets
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153030: [RISCV] Add test cases for insert subvector shuffles for fixed vectors
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153070: [RISCV] Fix a latent miscompile in doPeepholeMaskedRVV
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153180: [docs][TableGen][Target] Improve the documentation of the attribute value for SubtargetFeature.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153180: [docs][TableGen][Target] Improve the documentation of the attribute value for SubtargetFeature.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153180: [docs][TableGen][Target] Improve the documentation of the attribute value for SubtargetFeature.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153159: [RISCV] Add errors for mixing Zcmp with C/Zcd and D.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153159: [RISCV] Add errors for mixing Zcmp with C/Zcd and D.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153204: RISCVAsmParser: support comments in more places
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for XCVmac extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153194: [CodeGenPrepare][RISCV] Remove asserting VH references before erasing the dead GEP
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150416: [RISCV] Add a pass to combine `cm.pop` and `ret` insts
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153155: [RISCV] Remove legacy TA/TU pseudo distiction for VID
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D153050: [mlir][ArmSME] Insert intrinsics to enable/disable ZA
Cullen Rhodes via Phabricator via llvm-commits
- [llvm] e63e536 - [TextAPI] add osx to possible string to platform input
Cyndy Ishida via llvm-commits
- [PATCH] D149860: [TextAPI] Introduce SymbolSet
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D149860: [TextAPI] Introduce SymbolSet
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D153045: [llvm][tapi-diff] Transition diff-tool to be more general purpose
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D150803: Add a new `wasm_custom` clang attribute for marking functions.
Dan Gohman via Phabricator via llvm-commits
- [llvm] bc63aba - Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via llvm-commits
- [PATCH] D145211: Relax cross-section branches
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152843: Switch magic numbers to library functions in fixup
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D145211: Relax cross-section branches
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D152843: Switch magic numbers to library functions in fixup
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D149367: Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables
Daniel Paoliello via Phabricator via llvm-commits
- [PATCH] D153027: [llvm-objdump] --adjust-vma adjust symbol table
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D152523: [LV] Add cost model for simd vector select instructions of type float
Dave Green via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
Dave Green via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Dave Green via Phabricator via llvm-commits
- [PATCH] D152417: [AArch64] Add pipeline model for Neoverse N1
Dave Green via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
Dave Green via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
Dave Green via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
Dave Green via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
Dave Green via Phabricator via llvm-commits
- [PATCH] D152790: [ARM] Fix codegen of unaligned volatile load/store of i64
Dave Green via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Dave Green via Phabricator via llvm-commits
- [PATCH] D151086: [AArch64][SVE] Extra patterns for predicated and/or/xor
Dave Green via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
Dave Green via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Dave Green via Phabricator via llvm-commits
- [PATCH] D152815: [test] Update the checking base for LE and BE
Dave Green via Phabricator via llvm-commits
- [PATCH] D152245: [AArch64] Add tablegen patterns for faddp of two extracts
Dave Green via Phabricator via llvm-commits
- [PATCH] D141870: [DAG] Fold Op(vecreduce(a), vecreduce(b)) into vecreduce(Op(a,b))
Dave Green via Phabricator via llvm-commits
- [PATCH] D152815: [test] Update the checking base for LE and BE
Dave Green via Phabricator via llvm-commits
- [PATCH] D152826: [AArch64] Improve shuffles of i1 vectors (WIP)
Dave Green via Phabricator via llvm-commits
- [PATCH] D151894: [AArch64] Neoverse V2 scheduling model
Dave Green via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
Dave Green via Phabricator via llvm-commits
- [PATCH] D152930: [AArch64] Don't look at type size for scalable types in isExtFreeImpl
Dave Green via Phabricator via llvm-commits
- [PATCH] D152978: [DAGCombiner] Fix crash when trying to replace an indexed store with a narrow store.
Dave Green via Phabricator via llvm-commits
- [PATCH] D152930: [AArch64] Don't look at type size for scalable types in isExtFreeImpl
Dave Green via Phabricator via llvm-commits
- [PATCH] D149267: [AArch64][SVE] Add basic predicated add/sub patterns
Dave Green via Phabricator via llvm-commits
- [PATCH] D149967: [AArch64][SVE] Enable shouldFoldSelectWithIdentityConstant for SVE.
Dave Green via Phabricator via llvm-commits
- [PATCH] D152926: [DAGCombine] Support truncated constants for fptosi.sat combining
Dave Green via Phabricator via llvm-commits
- [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.
Dave Green via Phabricator via llvm-commits
- [PATCH] D152790: [ARM] Fix codegen of unaligned volatile load/store of i64
Dave Green via Phabricator via llvm-commits
- [PATCH] D153049: [AArch64] Try to convert vector shift operation into vector add operation
Dave Green via Phabricator via llvm-commits
- [PATCH] D152523: [LV] Add cost model for simd vector select instructions of type float
Dave Green via Phabricator via llvm-commits
- [PATCH] D151482: [LV] Add support for minimum/maximum intrinsics
Dave Green via Phabricator via llvm-commits
- [PATCH] D153244: [AArch64] Remove G_VECREDUCE_FADD from selectReduction
Dave Green via Phabricator via llvm-commits
- [PATCH] D152245: [AArch64] Add tablegen patterns for faddp of two extracts
Dave Green via Phabricator via llvm-commits
- [PATCH] D152245: [AArch64] Add tablegen patterns for faddp of two extracts
Dave Green via Phabricator via llvm-commits
- [PATCH] D153246: [AArch64] Mark vecreduce_fminimum and vecreduce_fmaximum as legal
Dave Green via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152657: [ADT] Remove deprecated functions in APInt
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152708: [RFC][Draft] Enable primitive support for Two-Level Line Tables in LLVM
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152708: [RFC][Draft] Enable primitive support for Two-Level Line Tables in LLVM
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
David Blaikie via Phabricator via llvm-commits
- [PATCH] D153048: [CMake] Add missing dependency in llvm Support unittests
David Blaikie via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
David Blaikie via Phabricator via llvm-commits
- [PATCH] D153048: [CMake] Add missing dependency in llvm Support unittests
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
David Blaikie via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
David Blaikie via Phabricator via llvm-commits
- [PATCH] D153163: Add __attribute__((warn_unused_result)) to LLVMErrorRef
David Blaikie via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
David Blaikie via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
David Blaikie via Phabricator via llvm-commits
- [compiler-rt] 203078b - sanitizers: intercept FreeBSD's cpuset_getaffinity call.
David Carlier via llvm-commits
- [compiler-rt] f5a8802 - sanitizers: enable pthread_getaffinity_np interception on freebsd.
David Carlier via llvm-commits
- [llvm] 16c4de1 - [AArch64][SVE] Extra patterns for predicated and/or/xor
David Green via llvm-commits
- [llvm] 14914fb - [DAG][NFC] Update comment on min/max reduction fold.
David Green via llvm-commits
- [llvm] f031df2 - [AArch64] Don't look at type size for scalable types in isExtFreeImpl
David Green via llvm-commits
- [llvm] 1643197 - [AArch64][SVE] Enable shouldFoldSelectWithIdentityConstant for SVE.
David Green via llvm-commits
- [llvm] 98153b0 - [AArch64] Fix check lines for arm64-neon-across.ll. NFC
David Green via llvm-commits
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David Li via Phabricator via llvm-commits
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David Li via Phabricator via llvm-commits
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Dhruv Chawla via llvm-commits
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- [PATCH] D152357: MachineConstantPool::getConstantPoolIndex - don't reuse mismatched constants contained undef/poison (Issue #63108)
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Elliot Goodrich via llvm-commits
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- [PATCH] D150997: [llvm] Split out DenseMapInfo<variant> specialization
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Esme Yi via Phabricator via llvm-commits
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- [PATCH] D152926: [DAGCombine] Support truncated constants for fptosi.sat combining
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Evgenii Stepanov via llvm-commits
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Evgeniy via Phabricator via llvm-commits
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Evgeniy via Phabricator via llvm-commits
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- [llvm] e3cc8f3 - [asan] Fix shadow load alignment for unaligned 128-bit load/store
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- [lld] daba24e - [ELF] << >>: make RHS less than 64
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- [llvm] 4c2fc26 - [RISCV] Use parseOptionalToken. NFC
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- [llvm] acc0224 - [MC] Remove an unneeded special case from MCObjectStreamer::flushPendingLabels
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- [llvm] d620ba0 - [MC] Remove unneeded isUndefined() for isSymbolRefDifferenceFullyResolved. NFC
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- [llvm] 11ebe3d - [RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation
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- [PATCH] D152170: [ELF] Fix early overflow check in finalizeAddressDependentContent
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- [PATCH] D148385: [RISCV] Implement KCFI operand bundle lowering
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- [PATCH] D153000: [WIP][RISCV] Make all floating-point instructions SEW-aware
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- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
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- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
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- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
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- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153097: [RISCV] Make linker-relaxable instructions terminate MCDataFragment
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153167: [MC] Reject CFI advance_loc separated by a non-private label for Mach-O
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153163: Add __attribute__((warn_unused_result)) to LLVMErrorRef
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
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- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153098: [AArch64] Emit fewer CFI instructions for synchronous unwind tables
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153096: [MC] Fold A-B when A's fragment precedes B's fragment
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153098: [AArch64] Emit fewer CFI instructions for synchronous unwind tables
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153189: [MC] Make .pseudo_probe GC-able
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153189: [MC] Make .pseudo_probe GC-able
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153189: [MC] Make .pseudo_probe GC-able
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153171: [SpecialCaseList] Remove TrigramIndex
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153189: [Pseudo Probe] Make .pseudo_probe GC-able
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153191: [Pseudo Probe] Do not place functions in nodeduplicate COMDATs
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153204: RISCVAsmParser: support comments in more places
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153204: RISCVAsmParser: support comments in more places
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153206: [PPC32] Parse bl __tls_get_addr(x at tlsgd)@plt+32768
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153206: [PPC32] Parse bl __tls_get_addr(x at tlsgd)@plt+32768
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153191: [Pseudo Probe] Do not place functions in nodeduplicate COMDATs
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146778: [lld] Preliminary fat-lto-object support
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- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
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- [PATCH] D152973: [gold] Add preliminary FatLTO support to the Gold plugin
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- [PATCH] D152973: [gold] Add preliminary FatLTO support to the Gold plugin
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- [PATCH] D153215: [Object] Add ELF section type SHT_LLVM_LTO for fat LTO
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- [PATCH] D152661: [XRay] Make xray_fn_idx entries PC-relative
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- [PATCH] D152831: [AArch64][MachO] Drop a 2015 ld64 workaround avoiding local relocations
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- [PATCH] D153223: [RL78 patch 1] Add RL78 ELF defintions
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- [PATCH] D153096: [MC] Fold A-B when A's fragment precedes B's fragment
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- [PATCH] D153097: [RISCV] Make linker-relaxable instructions terminate MCDataFragment
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D152661: [XRay] Make xray_fn_idx entries PC-relative
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- [PATCH] D152661: [XRay] Make xray_fn_idx entries PC-relative
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D152661: [XRay] Make xray_fn_idx entries PC-relative
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- [PATCH] D153239: [XRay] Make xray_instr_map compatible with Mach-O
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- [llvm] 42874f6 - [DebugInfo] Fix detection of hash collision in Apple Accel tables
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] 0f11a5f - Revert "[DebugInfo] Fix detection of hash collision in Apple Accel tables"
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] bae2e56 - [DebugInfo] Fix detection of hash collision in Apple Accel tables
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] 0b49e50 - [nfc][AppleTables] Rename iterator
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] f8a1d02 - [Coding style] Fix incorrect link syntax
Felipe de Azevedo Piovezan via llvm-commits
- [PATCH] D152691: [LICM] Sunk instructions with invalid source location.
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D152586: [DebugInfo] Fix detection of hash collision in Apple Accel tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D152586: [DebugInfo] Fix detection of hash collision in Apple Accel tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D152586: [DebugInfo] Fix detection of hash collision in Apple Accel tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153065: [nfc][AppleTables] Rename iterator
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153065: [nfc][AppleTables] Rename iterator
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D153066: [AppleTables] Implement iterator over all entries in table
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D152947: [DebugInfo] Change DWARFDebugAbbrev initialization
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [llvm] 06dab8f - [ConstraintElim] Extend monotonic phi test coverage.
Florian Hahn via llvm-commits
- [llvm] d209084 - [VPlan] Replace versioned stride with constant during VPlan opts.
Florian Hahn via llvm-commits
- [llvm] ea6ca9c - [LV] Fix crash when stride isn't a constant.
Florian Hahn via llvm-commits
- [llvm] 1665cb0 - [LSR] Add test cases showing bad handling of extends of post-inc uses.
Florian Hahn via llvm-commits
- [llvm] 672b35d - [LSR] Move new test to X86 subdir.
Florian Hahn via llvm-commits
- [llvm] baebe71 - [AArch64] Address post-commit comments from D150482.
Florian Hahn via llvm-commits
- [llvm] 0a246a0 - [LV] Use VPValues when creating GEP with all invariant indices.
Florian Hahn via llvm-commits
- [llvm] f63c038 - [LSR] Add test case for #58039.
Florian Hahn via llvm-commits
- [llvm] abfeda5 - [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via llvm-commits
- [llvm] fe19036 - [AMDGPU] Update test after abfeda5af329b58.
Florian Hahn via llvm-commits
- [llvm] f3a0ad2 - [LSR] Add test for #62660.
Florian Hahn via llvm-commits
- [llvm] 1797ab3 - Revert "[LSR] Consider post-inc form when creating extends/truncates."
Florian Hahn via llvm-commits
- [llvm] 8225698 - [LSR] Enable SCEV verification for test from f3a0ad2d and mark as XFAIL
Florian Hahn via llvm-commits
- [PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152659: [LV] Add IRBuilder folder to simplify GEP x, 0.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152660: [LV] Fold Add/Mul with neutral elements.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152659: [LV] Add IRBuilder folder to simplify GEP x, 0.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152684: [ConstraintElimination] Handle non-equality predicates
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152703: [MISched] Require asserts and AArch64 registered target for test.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152684: [ConstraintElimination] Handle solving-only non-equality predicates
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D151799: [ConstraintElim] Try to use first cmp to prove second cmp for ANDs.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D147783: [VPlan] Add stride->constant VPlan mapping at construction.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152744: [DSE] Don't eagerly optimize MemorySSA uses
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D142689: [SCEV] Remove applyLoopGuards ExprsToRewrite
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D147783: [VPlan] Add stride->constant VPlan mapping at construction.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152693: LoopVectorize: introduce RecurKind::Induction(I|F)(Max|Min)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D147783: [VPlan] Add stride->constant VPlan mapping at construction.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D151394: [LSR] Treat URem as uninteresting
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152728: [InstCombine] Factor out power of 2 comparison patterns to helper; NFC
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D150482: [AArch64] Don't use tbl lowering if ZExt can be folded into user.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153041: [InstCombine] Verify CmpInst is equality in `foldICmpPow2Test`; PR63327
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153202: [LSR] Return nullptr from getExpr if the result isn't invertible.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [llvm] 15a16ef - [MISched] Use StartAtCycle in trace dumps.
Francesco Petrogalli via llvm-commits
- [llvm] 45902a2 - [MISched] Require asserts and AArch64 registered target for test.
Francesco Petrogalli via llvm-commits
- [llvm] 623295a - [MISched][scheduleDump] Use stable_sort to prevent test failures.
Francesco Petrogalli via llvm-commits
- [llvm] 261a84f - [MISched] Fix non-debug builds.
Francesco Petrogalli via llvm-commits
- [PATCH] D150311: [MISched] Use StartAtCycle in trace dumps.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152703: [MISched] Require asserts and AArch64 registered target for test.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152703: [MISched] Require asserts and AArch64 registered target for test.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152703: [MISched] Require asserts and AArch64 registered target for test.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152800: [MISched][scheduleDump] Use stable_sort to prevent test failures.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D150311: [MISched] Use StartAtCycle in trace dumps.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152800: [MISched][scheduleDump] Use stable_sort to prevent test failures.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152817: [MISched] Fix non-debug builds.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152817: [MISched] Fix non-debug builds.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152817: [MISched] Fix non-debug builds.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D153116: [llc][MISched] Add `-misched-detail-resource-booking` to llc.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D153117: [MISched] Fix bug(s) in bottom-up scheduling.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D152213: ShrinkWrap: Ignore load/store until stack address computation
Francis Visoiu Mistrih via Phabricator via llvm-commits
- [PATCH] D152553: [RISCV] Use tail undisturbed vmv.v.v instead of vadd.vi with 0 for vp.merge with all ones mask.
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152313: [RISCV] Remove RISCVII::hasMergeOp. NFC
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152313: [RISCV] Remove RISCVII::hasMergeOp. NFC
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152380: [RISCV] Canonicalize towards vmerge w/passthrough representation
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152844: [RISCV][InsertVSETVLI] Rework code structure to make reasoning about undefined lanes explicit [NFC]
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152961: [RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D152915: [RISCV] Add support for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D135579: utils/update_mir_test_checks.py: allow checking fixedStack in .mir files
Gaëtan Bossu via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D152491: Fix bazel build --incompatible_no_implicit_file_export
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D147285: [Support] Extended llvm-profdata's merge functionality to exclude profiles from functions matching configurable patterns
Gerolf Hoflehner via Phabricator via llvm-commits
- [PATCH] D152258: [LV] Add mask support for vectorizing interleaved groups
Graham Hunter via Phabricator via llvm-commits
- [PATCH] D153086: [llvm-gsymutil] Fix command descriptions introduced in upstream D148775 when switching to OptTable
Greg Clayton via Phabricator via llvm-commits
- [PATCH] D152670: [IR] Remove getABITypeAlignment
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D151006: [bazel] Remove terminfo dependency
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D153093: [MBP] Enable duplicating return block to remove jump to return
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D153027: [llvm-objdump] --adjust-vma adjust symbol table
Hamidreza Sanaee via Phabricator via llvm-commits
- [PATCH] D153027: [llvm-objdump] --adjust-vma adjust symbol table
Hamidreza Sanaee via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refact MBB hotness/coldness into MBFI.
Han Shen via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into MBFI.
Han Shen via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into MBFI.
Han Shen via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into MBFI.
Han Shen via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into templated PSI functions
Han Shen via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into templated PSI functions
Han Shen via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into templated PSI functions
Han Shen via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into templated PSI functions
Han Shen via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into templated PSI functions
Han Shen via Phabricator via llvm-commits
- [llvm] 6fa1a2c - [X86] Fix callee side of receiving byval args on the stack
Hans Wennborg via llvm-commits
- [PATCH] D152696: Prevent deadlocks in death tests.
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D152696: Prevent deadlocks in death tests.
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D153020: [X86] Fix callee side of receiving byval args on the stack
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D153020: [X86] Fix callee side of receiving byval args on the stack
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D139827: [RISCV][Asan] Use dynamic shadow offset to make it work on different width of virtual-memory system.
Hau Hsu via Phabricator via llvm-commits
- [PATCH] D152600: [InstCombine] Add target option to bail scalarization
Hendrik Greving via Phabricator via llvm-commits
- [PATCH] D152600: [InstCombine] Add target option to bail scalarization
Hendrik Greving via Phabricator via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
Henrik G Olsson via Phabricator via llvm-commits
- [PATCH] D152595: [PseudoProbe] Disgard probes for dead functions.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D152595: [PseudoProbe] Disgard probes for dead functions.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .txt
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D152595: [PseudoProbe] Disgard probes for dead functions.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D152546: [Pseudo Probe] Placing .pseudoprobe section in a comdat group
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D146853: [Pseudo Probe] Placing .pseudoprobe section in the same comdat group with .text
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D153189: [MC] Make .pseudo_probe GC-able
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D153189: [MC] Make .pseudo_probe GC-able
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D153189: [MC] Make .pseudo_probe GC-able
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D153191: [Pseudo Probe] Do not place functions in nodeduplicate COMDATs
Hongtao Yu via Phabricator via llvm-commits
- [llvm] 211f27f - [CodeGen] Add pre-commit tests for D152022 and D152558
Igor Kirillov via llvm-commits
- [llvm] 2cbc265 - [CodeGen] Add support for reductions in ComplexDeinterleaving pass
Igor Kirillov via llvm-commits
- [PATCH] D152258: [LV] Add mask support for vectorizing interleaved groups
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D152258: [LV] Add mask support for vectorizing interleaved groups
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D152025: [CodeGen] Add pre-commit tests for D152022
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D152022: [CodeGen] Add support for reductions in ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D152022: [CodeGen] Add support for reductions in ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D152022: [CodeGen] Add support for reductions in ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D153098: [AArch64] Emit fewer CFI instructions for synchronous unwind tables
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D153098: [AArch64] Emit fewer CFI instructions for synchronous unwind tables
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D153098: [AArch64] Emit fewer CFI instructions for synchronous unwind tables
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D153098: [AArch64] Emit fewer CFI instructions for synchronous unwind tables
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D149759: [symbolizer] Support symbol lookup
Igor Kudrin via Phabricator via llvm-commits
- [llvm] 884bf2e - [NFC][SLP] Fix a few minor formatting issues
Ivan Kelarev via llvm-commits
- [PATCH] D152395: [NFC][SLP] Fix a few minor formatting issues
Ivan Kelarev via Phabricator via llvm-commits
- [llvm] d09fa8f - [AMDGPU][GFX11] Add test coverage for cases involving conversions from and to fp16 values.
Ivan Kosarev via llvm-commits
- [llvm] 616d30c - [AMDGPU][AsmParser][NFC] Simplify the EndpgmImm operand definition.
Ivan Kosarev via llvm-commits
- [llvm] 150c73a - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 2.
Ivan Kosarev via llvm-commits
- [llvm] 024e540 - [AMDGPU][AsmParser][NFC] Get rid of custom default operand handlers.
Ivan Kosarev via llvm-commits
- [llvm] e9d77cd - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 3.
Ivan Kosarev via llvm-commits
- [llvm] 980d2b3 - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 4.
Ivan Kosarev via llvm-commits
- [llvm] 79c8301 - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 5.
Ivan Kosarev via llvm-commits
- [llvm] c288709 - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 6.
Ivan Kosarev via llvm-commits
- [llvm] 7680951 - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 7.
Ivan Kosarev via llvm-commits
- [llvm] 9792c80 - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 8.
Ivan Kosarev via llvm-commits
- [llvm] 9aa026e - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 9.
Ivan Kosarev via llvm-commits
- [llvm] e95457d - [AMDGPU][AsmParser][NFC] Simplify v_interp-related operand definitions.
Ivan Kosarev via llvm-commits
- [llvm] 7a12fbc - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 11.
Ivan Kosarev via llvm-commits
- [llvm] 41717fd - [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 15.
Ivan Kosarev via llvm-commits
- [PATCH] D152557: [AMDGPU][GFX11] Add test coverage for cases involving conversions from and to fp16 values.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152557: [AMDGPU][GFX11] Add test coverage for cases involving conversions from and to fp16 values.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152715: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 2.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152716: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 3.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152717: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 4.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152717: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 4.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152805: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 5.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152807: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 6.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152808: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 7.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152809: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 8.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152715: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 2.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152716: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 3.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152717: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 4.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152805: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 5.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152807: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 6.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152808: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 7.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152809: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 8.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152805: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 5.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D151687: [AMDGPU][AsmParser][NFC] Simplify the EndpgmImm operand definition.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D151687: [AMDGPU][AsmParser][NFC] Simplify the EndpgmImm operand definition.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152715: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 2.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D151688: [AMDGPU][AsmParser][NFC] Get rid of custom default operand handlers.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152897: [AMDGPU][AsmParser][NFC] Simplify v_interp-related operand definitions.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152716: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 3.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152805: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 5.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152807: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 6.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152808: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 7.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152809: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 8.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152902: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 9.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152903: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 10.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152904: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 11.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152905: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 12.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152906: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 13.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152907: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 14.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152908: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 15.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152909: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 16.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152373: [AMDGPU][TableGen][WIP] Warn on unused classes and multiclasses.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152925: [AMDGPU] Remove unused TableGen classes and multiclasses.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152716: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 3.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152717: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 4.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152805: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 5.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152807: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 6.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152808: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 7.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152809: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 8.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152902: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 9.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152897: [AMDGPU][AsmParser][NFC] Simplify v_interp-related operand definitions.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152373: [TableGen] Support warnings on unused classes and multiclasses.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152909: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 16.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152909: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 16.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152904: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 11.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D152908: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 15.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D153012: Update module flags documentation for Min.
Jacob Bramley via Phabricator via llvm-commits
- [llvm] f4b58f8 - [AIX] Disable test for missing DWARF section
Jake Egan via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Jake Egan via Phabricator via llvm-commits
- [PATCH] D147652: [symbolizer] Check existence of input file in GNU mode
James Henderson via Phabricator via llvm-commits
- [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.
James Henderson via Phabricator via llvm-commits
- [PATCH] D89049: [AIX][XCOFF] print out the traceback info
James Henderson via Phabricator via llvm-commits
- [PATCH] D150276: [llvm-objcopy] -O binary: do not align physical addresses
James Henderson via Phabricator via llvm-commits
- [PATCH] D89049: [AIX][XCOFF] print out the traceback info
James Henderson via Phabricator via llvm-commits
- [PATCH] D89049: [AIX][XCOFF] print out the traceback info
James Henderson via Phabricator via llvm-commits
- [PATCH] D150276: [llvm-objcopy] -O binary: do not align physical addresses
James Henderson via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
James Henderson via Phabricator via llvm-commits
- [PATCH] D152869: [nfc] Factoring out utility that can be used for other object-level tools
James Henderson via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
James Henderson via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
James Henderson via Phabricator via llvm-commits
- [PATCH] D149058: [BPF][DebugInfo] Use .BPF.ext for line info when DWARF is not available
James Henderson via Phabricator via llvm-commits
- [PATCH] D153223: [RL78 patch 1] Add RL78 ELF defintions
James Henderson via Phabricator via llvm-commits
- [PATCH] D152401: CGExprCXX: emit family and allockind attributes
James Y Knight via Phabricator via llvm-commits
- [PATCH] D147217: [OpenMP][OMPIRBuilder] OpenMPIRBuilder support for requires directive
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Jannik Silvanus via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Jannik Silvanus via Phabricator via llvm-commits
- [PATCH] D144999: [Clang][MC][MachO]Only emits compact-unwind format for "canonical" personality symbols. For the rest, use DWARFs.
Jason Molenda via Phabricator via llvm-commits
- [llvm] 6c03f40 - [AMDGPU] Use a common check prefix in regbankselect-amdgcn.s.buffer.load.ll
Jay Foad via llvm-commits
- [llvm] e829eb9 - [update_mir_test_checks] Tolerate -simplify-mir output
Jay Foad via llvm-commits
- [llvm] d065adc - [AMDGPU] Regenerate a few checks
Jay Foad via llvm-commits
- [llvm] da7892f - [MC] Use regunits instead of MCRegUnitIterator. NFC.
Jay Foad via llvm-commits
- [llvm] 2124759 - [AMDGPU] Regenerate llvm.amdgcn.s.buffer.load checks
Jay Foad via llvm-commits
- [llvm] 8431316 - [AMDGPU] Stop replacing amdgcn.ballot(1) with amdgcn.s.getreg(exec)
Jay Foad via llvm-commits
- [llvm] 01b5128 - [AMDGPU] Generate checks for load-constant tests
Jay Foad via llvm-commits
- [PATCH] D151997: [AMDGPU] Document amdgpu_cs_chain[_preserve] CCs. NFC
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152697: AMDGPU: Add llvm.amdgcn.log intrinsic
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152702: AMDGPU: Add basic folds for llvm.amdgcn.log
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152098: [MC] Add MCRegisterInfo::regunits for iteration over register units
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpenv.ll
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152797: [AMDGPU][ValueTracking] Precommit tests for amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Jay Foad via Phabricator via llvm-commits
- [PATCH] D135579: utils/update_mir_test_checks.py: allow checking fixedStack in .mir files
Jay Foad via Phabricator via llvm-commits
- [PATCH] D135579: utils/update_mir_test_checks.py: allow checking fixedStack in .mir files
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151807: [InstCombine] Revisit user of newly one-use instructions
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152896: [update_mir_test_checks] Tolerate -simplify-mir output
Jay Foad via Phabricator via llvm-commits
- [PATCH] D135579: utils/update_mir_test_checks.py: allow checking fixedStack in .mir files
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152896: [update_mir_test_checks] Tolerate -simplify-mir output
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151807: [InstCombine] Revisit user of newly one-use instructions
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152901: AMDGPU: Add llvm.amdgcn.exp2 intrinsic
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer by default.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152957: ValueTracking: Fix nan result handling for fmul
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152098: [MC] Add MCRegisterInfo::regunits for iteration over register units
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152098: [MC] Add MCRegisterInfo::regunits for iteration over register units
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152373: [TableGen] Support warnings on unused classes and multiclasses.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152943: [AMDGPU] Fix VOPD dependency checks during combine
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151688: [AMDGPU][AsmParser][NFC] Get rid of custom default operand handlers.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152440: [AMDGPU] Trim trailing undefs from the end of image and buffer store
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152957: ValueTracking: Fix nan result handling for fmul
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152440: [AMDGPU] Trim trailing undefs from the end of image and buffer store
Jay Foad via Phabricator via llvm-commits
- [PATCH] D152809: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 8.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153047: [AMDGPU] Stop replacing amdgcn.ballot(1) with amdgcn.s.getreg(exec)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153047: [AMDGPU] Stop replacing amdgcn.ballot(1) with amdgcn.s.getreg(exec)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D147154: [AMDGPU][GlobalISel] Add codegen support for S_INDIRECT_REG_WRITE_MOVREL_B32_V[9|10|11|12]
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153122: [MC] Use regunits instead of MCRegUnitIterator. NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153122: [MC] Use regunits instead of MCRegUnitIterator. NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153122: [MC] Use regunits instead of MCRegUnitIterator. NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153122: [MC] Use regunits instead of MCRegUnitIterator. NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153122: [MC] Use regunits instead of MCRegUnitIterator. NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153139: [AMDGPU] Generate checks for load-constant tests
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153139: [AMDGPU] Generate checks for load-constant tests
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153151: [EarlyCSE] Do not CSE convergent readnone calls
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153047: [AMDGPU] Stop replacing amdgcn.ballot(1) with amdgcn.s.getreg(exec)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153047: [AMDGPU] Stop replacing amdgcn.ballot(1) with amdgcn.s.getreg(exec)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153151: [EarlyCSE] Do not CSE convergent readnone calls
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153139: [AMDGPU] Generate checks for load-constant tests
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151972: [flang][openacc] Add parsing support for dim in gang clause
Jean Perier via Phabricator via llvm-commits
- [PATCH] D147732: [AMDGPU] Add type mangling for {read, write, readfirst, perm}lane intrinsics
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D149773: [AMDGPU][IGLP] Add iglp_opt(1) strategy for single wave gemms
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D143018: [DAGCombiner][NFC] Factor out ByteProvider
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D143018: [DAGCombiner][NFC] Factor out ByteProvider
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D143018: [DAGCombiner][NFC] Factor out ByteProvider
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D152147: [RISCV] Fold binary op into select if profitable.
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D152750: [RISCV] Enable SLP by default (when vectors are available)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Jessica Clarke via Phabricator via llvm-commits
- [llvm] 8846cd3 - [RISCV][NFC] Simplify code.
Jianjian GUAN via llvm-commits
- [llvm] 04ed822 - [RISCV] Match shl (ext v, splat 1) to vector widening add.
Jianjian GUAN via llvm-commits
- [PATCH] D152679: [RISCV] Eliminate the extension of index for vector indexed load/store.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D152679: [RISCV] Eliminate the extension of index for vector indexed load/store.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D152786: [RISCV][NFC] Pre-commit test for D152679.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D152679: [RISCV] Eliminate the extension of index for vector indexed load/store.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D153095: [RISCV][NFC] Simplify code.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D153095: [RISCV][NFC] Simplify code.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D153095: [RISCV][NFC] Simplify code.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D153112: [RISCV] Match shl (ext v, splat 1) to vector widening add.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D153112: [RISCV] Match shl (ext v, splat 1) to vector widening add.
Jianjian Guan via Phabricator via llvm-commits
- [llvm] dff3ebc - Remove unused variable 's8' in X86LegalizerInfo.cpp (NFC)
Jie Fu via llvm-commits
- [llvm] c2b486a - Remove unused variable 's32' in X86LegalizerInfo.cpp (NFC)
Jie Fu via llvm-commits
- [llvm] ac39cbc - Remove unused functions in X86LegalizerInfo.cpp (NFC)
Jie Fu via llvm-commits
- [llvm] 974b1a6 - [GlobalIsel][X86] Remove unused private field 'TM' in X86LegalizerInfo (NFC)
Jie Fu via llvm-commits
- [PATCH] D152776: [LibCallsShrinkWrap] Set IsFPConstrained is true for creating quiet floating comparision
Jim Lin via Phabricator via llvm-commits
- [PATCH] D152776: [LibCallsShrinkWrap] Set IsFPConstrained is true for creating quiet floating comparision
Jim Lin via Phabricator via llvm-commits
- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jin Ma via Phabricator via llvm-commits
- [compiler-rt] fcf92cb - [tsan] Check for nullptr on user_alloc_usable_size_fast
Jin Xin Ng via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D153049: [AArch64] Try to convert vector shift operation into vector add operation
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D153049: [AArch64] Try to convert vector shift operation into vector add operation
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D153049: [AArch64] Try to convert vector shift operation into vector add operation
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D153049: [AArch64] Try to convert vector shift operation into vector add operation
JinGu Kang via Phabricator via llvm-commits
- [llvm] 16daaf0 - [AArch64] Try to combine MULL with uzp1.
Jingu Kang via llvm-commits
- [llvm] 82d330e - [AArch64] Try to convert vector shift operation into vector add operation
Jingu Kang via llvm-commits
- [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink
Job Noorman via Phabricator via llvm-commits
- [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink
Job Noorman via Phabricator via llvm-commits
- [PATCH] D145687: [BOLT] Add minimal RISC-V 64-bit support
Job Noorman via Phabricator via llvm-commits
- [PATCH] D153073: [LLDB] Add DWARF definitions for the new Mojo language
Joe Loser via Phabricator via llvm-commits
- [PATCH] D152613: [AMDGPU] Remove integer division in VOPD checks
Joe Nash via Phabricator via llvm-commits
- [PATCH] D152715: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 2.
Joe Nash via Phabricator via llvm-commits
- [PATCH] D152715: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 2.
Joe Nash via Phabricator via llvm-commits
- [PATCH] D152805: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 5.
Joe Nash via Phabricator via llvm-commits
- [PATCH] D152809: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 8.
Joe Nash via Phabricator via llvm-commits
- [PATCH] D152909: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 16.
Joe Nash via Phabricator via llvm-commits
- [PATCH] D152943: [AMDGPU] Fix VOPD dependency checks during combine
Joe Nash via Phabricator via llvm-commits
- [PATCH] D152909: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 16.
Joe Nash via Phabricator via llvm-commits
- [PATCH] D153169: [AMDGPU] Fix operand class of v_ldexp_f16 src1
Joe Nash via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Joel E. Denny via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Joel E. Denny via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Joel E. Denny via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Joel E. Denny via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Joel E. Denny via Phabricator via llvm-commits
- [llvm] d50423a - [Attributor][NFC] Precommit test for #63291
Johannes Doerfert via llvm-commits
- [llvm] 6d8f14f - [Attributor][FIX] Ensure unknown accesses are honored
Johannes Doerfert via llvm-commits
- [llvm] bed6a6e - [Attributor][NFC] Make the MustBeExecutedContextExplorer optional
Johannes Doerfert via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D152789: NVPTX: Lower unreachable to exit to allow ptxas to accurately reconstruct the CFG.
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D115559: AMDGPU: Propagate amdgpu-waves-per-eu with attributor
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D152789: NVPTX: Lower unreachable to exit to allow ptxas to accurately reconstruct the CFG.
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D150860: [OpenMP] Change clang emitTargetDataCalls to use OMPIRBuilder
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D150860: [OpenMP] Change clang emitTargetDataCalls to use OMPIRBuilder
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
John Brawn via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
John Brawn via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
John Brawn via Phabricator via llvm-commits
- [PATCH] D152689: [NFC] Remove dead conditionals
John McCall via Phabricator via llvm-commits
- [PATCH] D153190: [UpdateTestChecks] Add update test check support for fpmath metadata
John McIver via Phabricator via llvm-commits
- [PATCH] D153187: [NFC][llvm] Update SPL Vectorizer X86 metadata test to use check-globals
John McIver via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
Jolanta Jensen via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
Jolanta Jensen via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
Jolanta Jensen via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
Jolanta Jensen via Phabricator via llvm-commits
- [llvm] 65f6373 - [dsymutil] Skip duplicates files with identical time stamps in the debug map
Jonas Devlieghere via llvm-commits
- [llvm] 9cacc22 - [dsymutil] Use a regex in the static-archive-collision.test
Jonas Devlieghere via llvm-commits
- [llvm] e0d5729 - [DebugInfo] Always emit `.debug_names` with DWARF 5 for Apple platforms
Jonas Devlieghere via llvm-commits
- [llvm] 04c0161 - Revert "[DebugInfo] Always emit `.debug_names` with DWARF 5 for Apple platforms"
Jonas Devlieghere via llvm-commits
- [llvm] fc60bf2 - [DebugInfo] Always emit `.debug_names` with DWARF 5 for Apple platforms
Jonas Devlieghere via llvm-commits
- [llvm] 8119ab9 - [dsymutil] Fix .debug_addr index calculation
Jonas Devlieghere via llvm-commits
- [llvm] 8e1f820 - [dsymutil] Update DWARF 5 tests after 8119ab9bf78b
Jonas Devlieghere via llvm-commits
- [PATCH] D152585: [dsymutil] Skip duplicates files with identical time stamps in the debug map
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D152585: [dsymutil] Skip duplicates files with identical time stamps in the debug map
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D152585: [dsymutil] Skip duplicates files with identical time stamps in the debug map
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D118754: [DebugInfo] Always emit `.debug_names` with dwarf 5 for Apple platforms
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D118754: [DebugInfo] Always emit `.debug_names` with dwarf 5 for Apple platforms
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D153010: [DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Joseph Huber via Phabricator via llvm-commits
- [llvm] 67d4538 - [SimpleLoopUnswitch][NFC] Add tests for and/or conditions of selects
Joshua Cao via llvm-commits
- [llvm] 2f171b2 - [SimpleLoopUnswitch] Unswitch AND/OR conditions of selects
Joshua Cao via llvm-commits
- [PATCH] D142689: [SCEV] Remove applyLoopGuards ExprsToRewrite
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D151677: [SimpleLoopUnswitch] Unswitch AND/OR conditions of selects
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D151677: [SimpleLoopUnswitch] Unswitch AND/OR conditions of selects
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D148780: [BBUtils][NFC] Delete SplitLandingPadPredecessors with DT
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D151677: [SimpleLoopUnswitch] Unswitch AND/OR conditions of selects
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D152241: [CaptureTracking] Do not capture compares of same object
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D152241: [CaptureTracking] Do not capture compares of same object
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D151664: [lit] Add a method to lit.TestFormat to get the list of tests associated to a path
Julian Lettner via Phabricator via llvm-commits
- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jun Sha via Phabricator via llvm-commits
- [PATCH] D153234: [RISCV] Add codegen for Zfbfmin instructions
Jun Sha via Phabricator via llvm-commits
- [PATCH] D153234: [RISCV] Add codegen for Zfbfmin instructions
Jun Sha via Phabricator via llvm-commits
- [PATCH] D153234: [RISCV] Add codegen for Zfbfmin instructions
Jun Sha via Phabricator via llvm-commits
- [llvm] 24563b8 - [llvm-cov] Normalize paths by removing dots
Justin Bogner via llvm-commits
- [PATCH] D152453: llvm-cov produces inconsistent result when file appears multiple times in gcno
Justin Bogner via Phabricator via llvm-commits
- [PATCH] D152453: llvm-cov produces inconsistent result when file appears multiple times in gcno
Justin Bogner via Phabricator via llvm-commits
- [compiler-rt] 10e1d50 - [test][ASAN] Fix incorrect REQUIRES directive for scandir.c
Justin Cady via llvm-commits
- [PATCH] D78669: PowerPC: Add emergency stack spill slots for SPE
Justin Hibbits via Phabricator via llvm-commits
- [PATCH] D152669: [AIX][TLS] Generate 32-bit local-exec access code sequence
Kamau Bridgeman via Phabricator via llvm-commits
- [PATCH] D153034: [PowerPC][Future] Enable __builtin_mma_xxm[t|f]acc on PFuture
Kamau Bridgeman via Phabricator via llvm-commits
- [PATCH] D153034: [PowerPC][Future] Enable __builtin_mma_xxm[t|f]acc on PFuture
Kamau Bridgeman via Phabricator via llvm-commits
- [PATCH] D153034: [PowerPC][Future] Enable __builtin_mma_xxm[t|f]acc on future isa
Kamau Bridgeman via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows
Kan Shengchen via Phabricator via llvm-commits
- [llvm] 9eea63b - [AMDGPU] Fix resource-usage-pal.ll
Kazu Hirata via llvm-commits
- [llvm] 1f9aaf5 - [IR] Remove getABITypeAlignment
Kazu Hirata via llvm-commits
- [llvm] 3984983 - [RISCV] Fix an unused variable warning
Kazu Hirata via llvm-commits
- [llvm] 8876220 - [ExecutionEngine] Remove unused functions
Kazu Hirata via llvm-commits
- [llvm] 0df7e9f - [ADT] Remove deprecated functions in APInt
Kazu Hirata via llvm-commits
- [llvm] c97ab93 - [CodeGen] Fix a warning
Kazu Hirata via llvm-commits
- [lld] da12f05 - [lld] Remove unused forward declarations for DefinedRelative
Kazu Hirata via llvm-commits
- [llvm] 59723e4 - [Target] Use llvm::is_contained (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D152670: [IR] Remove getABITypeAlignment
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D152668: [ExecutionEngine] Remove unused functions
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D152657: [ADT] Remove deprecated functions in APInt
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D152783: [ExecutionEngine] Remove unused function cloneGlobalAliasDecl
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D152784: [ExecutionEngine] Remove unused function createIRTypedAddress
Kazu Hirata via Phabricator via llvm-commits
- [llvm] f101738 - [llvm-objdump/mac] Add support for LC_ATOM_INFO
Keith Smiley via llvm-commits
- [lld] 806f5b3 - [lld-macho] Switch to new tool ID
Keith Smiley via llvm-commits
- [PATCH] D152847: [llvm-objdump/mac] Add support for LC_ATOM_INFO
Keith Smiley via Phabricator via llvm-commits
- [PATCH] D152847: [llvm-objdump/mac] Add support for LC_ATOM_INFO
Keith Smiley via Phabricator via llvm-commits
- [PATCH] D152929: [lld-macho] Switch to new tool ID
Keith Smiley via Phabricator via llvm-commits
- [PATCH] D39118: [Mach-O] Fix incorrect symbol grouping for i386
Keith Smiley via Phabricator via llvm-commits
- [PATCH] D39118: [Mach-O] Fix incorrect symbol grouping for i386
Keith Smiley via Phabricator via llvm-commits
- [PATCH] D6840: Remove dead code and unused file
Keith Smiley via Phabricator via llvm-commits
- [PATCH] D152929: [lld-macho] Switch to new tool ID
Keith Smiley via Phabricator via llvm-commits
- [llvm] 049324a - Revert "[SystemZ][z/OS] Correct value of length/4 of params field in PPA1."
Kevin P. Neal via llvm-commits
- [compiler-rt] 686cb26 - [Sanitizer] Add munmap interceptor in sanitizer_common
Kirill Stoimenov via llvm-commits
- [compiler-rt] fba9fd1 - [HWASAN] Implement munmap interceptor for HWASAN
Kirill Stoimenov via llvm-commits
- [compiler-rt] ceab8e3 - [HWASAN] Fix bot test failure caused by D152763 by switching to
Kirill Stoimenov via llvm-commits
- [compiler-rt] 7ebfc36 - [Sanitizers] Remove unused parameter from COMMON_INTERCEPTOR_MUNMAP_IMPL
Kirill Stoimenov via llvm-commits
- [PATCH] D152170: [ELF] Fix early overflow check in finalizeAddressDependentContent
Kirill Stoimenov via Phabricator via llvm-commits
- [PATCH] D152170: [ELF] Fix early overflow check in finalizeAddressDependentContent
Kirill Stoimenov via Phabricator via llvm-commits
- [PATCH] D144936: [SPARC][IAS] Recognize more SPARCv9 instructions/pseudoinstructions
Koakuma via Phabricator via llvm-commits
- [PATCH] D144936: [SPARC][IAS] Recognize more SPARCv9 instructions/pseudoinstructions
Koakuma via Phabricator via llvm-commits
- [PATCH] D150943: [SimplifyCFG] add nsw on BuildLookuptable LinearMap calculation
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D150943: [SimplifyCFG] add nsw on BuildLookuptable LinearMap calculation
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D153238: [SimplifyCFG] precommit test for LinearMap nsw (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D153238: [SimplifyCFG] precommit test for LinearMap nsw (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D150943: [SimplifyCFG] add nsw on BuildLookuptable LinearMap calculation
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D152619: [CMake] Fixes using CMake 3.27.0.
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D152619: [CMake] Fixes using CMake 3.27.0.
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [llvm] 85f1726 - [RDF] Stop looking when reached code node in getNextRef with NextOnly
Krzysztof Parzyszek via llvm-commits
- [llvm] 2af7036 - [RDF] Allow RegisterRef to contain register unit
Krzysztof Parzyszek via llvm-commits
- [llvm] 375d798 - [RDF] Define short type names: NodeAddr<XyzNode*> -> Xyz, NFC
Krzysztof Parzyszek via llvm-commits
- [llvm] dbee656 - [RDF] Add RegisterRef::idx and make toUnitId constexpr
Krzysztof Parzyszek via llvm-commits
- [llvm] 369dba5 - [RDF] Print regmask index in more user-friendly way
Krzysztof Parzyszek via llvm-commits
- [llvm] bd66f4b - [RDF] Do not return register masks in PhysicalRegisterInfo::getAliasSet
Krzysztof Parzyszek via llvm-commits
- [llvm] d57646b - [RDF] Allow individual units in PhysicalRegisterInfo::alias
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- [llvm] edfcc3a - [RDF] Remove unused parameter AllRefs from buildPhis
Krzysztof Parzyszek via llvm-commits
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Krzysztof Parzyszek via llvm-commits
- [llvm] 198d647 - [RDF] Remove unused variant of getNextShadow, NFC
Krzysztof Parzyszek via llvm-commits
- [llvm] 3eeebfe - [RDF] Minor refactoring for clarity, NFC
Krzysztof Parzyszek via llvm-commits
- [llvm] 39ab9da - [RDF] Create build config
Krzysztof Parzyszek via llvm-commits
- [llvm] 0608764 - [Hexagon] Do not track reserved regs in RDF optimizations
Krzysztof Parzyszek via llvm-commits
- [llvm] 4351060 - [Hexagon] Properly combine overlapping stores in HVC
Krzysztof Parzyszek via llvm-commits
- [llvm] 77e4c48 - [Hexagon] Generate correct instruction for store i1, ($Rs<<$u2 + $Rt)
Krzysztof Parzyszek via llvm-commits
- [llvm] d1c3ec6 - [Hexagon] Add missing patterns for truncate to vNi1
Krzysztof Parzyszek via llvm-commits
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Krzysztof Parzyszek via llvm-commits
- [llvm] 5ad9adb - [Hexagon] Add missing patterns for boolean [v]selects
Krzysztof Parzyszek via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D144911: adding bf16 support to NVPTX
Kushan Ahmadian via Phabricator via llvm-commits
- [PATCH] D144911: adding bf16 support to NVPTX
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- [llvm] 102c79f - [gn build] Port 11e5a0d290ba
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- [llvm] 79e53ee - [gn build] Port cd916108b4c6
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- [llvm] fc7e60f - [gn build] Port 474a2b9367ad
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- [llvm] 2cd4dc5 - [gn build] Port 3a7876f6e2b0
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- [PATCH] D152668: [ExecutionEngine] Remove unused functions
Lang Hames via Phabricator via llvm-commits
- [PATCH] D152667: [ExecutionEngine] Remove unused function addCustomSectionParser
Lang Hames via Phabricator via llvm-commits
- [PATCH] D152783: [ExecutionEngine] Remove unused function cloneGlobalAliasDecl
Lang Hames via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Lei Huang via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Lei Huang via Phabricator via llvm-commits
- [PATCH] D152669: [AIX][TLS] Generate 32-bit local-exec access code sequence
Lei Huang via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Lei Huang via Phabricator via llvm-commits
- [PATCH] D152911: [PowerPC] Remove extend between shift and and
Lei Huang via Phabricator via llvm-commits
- [PATCH] D64584: [AMDGPU] gfx908 mfma support
Lei Wang via Phabricator via llvm-commits
- [PATCH] D64584: [AMDGPU] gfx908 mfma support
Lei Wang via Phabricator via llvm-commits
- [lld] aa49521 - Revert "[LLD] Allow usage of LLD as a library"
Leonard Chan via llvm-commits
- [compiler-rt] 17623e9 - [compiler-rt] Go back to using the 32-bit allocator for Fuchsia+RISCV64
Leonard Chan via llvm-commits
- [PATCH] D152585: [dsymutil] Skip duplicates files with identical time stamps in the debug map
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D152750: [RISCV] Enable SLP by default (when vectors are available)
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Leonard Chan via Phabricator via llvm-commits
- [llvm] c24a39b - [gn] Mac support for check-asan target
Leonard Grey via llvm-commits
- [PATCH] D152591: [gn] Add Mac support to check-asan target
Leonard Grey via Phabricator via llvm-commits
- [PATCH] D152591: [gn] Add Mac support to check-asan target
Leonard Grey via Phabricator via llvm-commits
- [PATCH] D153072: [lsan] Be more conservative in SuspendedThreadsListMac::GetRegistersAndSP
Leonard Grey via Phabricator via llvm-commits
- [PATCH] D153081: [lsan] Remove use_tls=0 from a few tests
Leonard Grey via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
Lewis Revill via Phabricator via llvm-commits
- [PATCH] D152993: [VP][RISCV] Add vp.fpclass and RISC-V support
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D152128: [RISCV] Fold special case (xor (setcc constant, y, setlt), 1) -> (setcc y, constant + 1, setlt)
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D152993: [VP][RISCV] Add vp.fpclass and RISC-V support
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D152128: [RISCV] Fold special case (xor (setcc constant, y, setlt), 1) -> (setcc y, constant + 1, setlt)
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D152128: [RISCV] Fold special case (xor (setcc constant, y, setlt), 1) -> (setcc y, constant + 1, setlt)
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D140528: [msan] Add msan support for loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D140528: [MSan] Enable MSAN for loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D152692: [sanitizer][msan] The LLVM part of the LoongArch memory sanitizer implementation
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D152692: [sanitizer][msan] The LLVM part of the LoongArch memory sanitizer implementation
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D150763: [NFC][Py Reformat] Reformat python files in libcxx/libcxxabi
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D152778: [LoongArch] Ignore warnings when there are no environment in triple
Lu Weining via Phabricator via llvm-commits
- [PATCH] D152778: [LoongArch] Ignore warnings when there is no environment in triple
Lu Weining via Phabricator via llvm-commits
- [PATCH] D153119: [LoongArch] Precommit test for the fix of CSRWR and CSRXCHG
Lu Weining via Phabricator via llvm-commits
- [PATCH] D153120: [LoongArch] Fix handling of the chain of CSRWR and CSRXCHG nodes
Lu Weining via Phabricator via llvm-commits
- [PATCH] D153119: [LoongArch][NFC] Precommit test for D153120 (the fix of CSRWR and CSRXCHG)
Lu Weining via Phabricator via llvm-commits
- [PATCH] D153120: [LoongArch] Fix handling of the chain of CSRWR and CSRXCHG nodes
Lu Weining via Phabricator via llvm-commits
- [PATCH] D153119: [LoongArch][NFC] Precommit test for D153120 (the fix of CSRWR and CSRXCHG)
Lu Weining via Phabricator via llvm-commits
- [PATCH] D153120: [LoongArch] Fix handling of the chain of CSRWR and CSRXCHG nodes
Lu Weining via Phabricator via llvm-commits
- [PATCH] D153193: [LoongArch] Optimize conditional selection of integer
Lu Weining via Phabricator via llvm-commits
- [PATCH] D153129: [AArch64][RCPC3] Instruction selection for LDAP1/STL1 instructions
Lucas Prates via Phabricator via llvm-commits
- [llvm] 2a1716d - [LegalizeTypes][VP] Widen load/store of fixed length vectors to VP ops
Luke Lau via llvm-commits
- [llvm] a849940 - [RISCV] Use TU vmv.v.v instead of vslideup.vi N, M, 0 for insert vector_shuffles
Luke Lau via llvm-commits
- [PATCH] D148713: [LegalizeTypes][VP] Widen load/store of fixed length vectors to VP ops
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152724: [RISCV] Use TU vmv.v.v instead of vslideup.vi N, M, 0 for insert vector_shuffles
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152724: [RISCV] Use TU vmv.v.v instead of vslideup.vi N, M, 0 for insert vector_shuffles
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152380: [RISCV] Canonicalize towards vmerge w/passthrough representation
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152810: [RISCV] Fix IMPLICIT_DEF check in doPeepholeMaskedRVV
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152844: [RISCV][InsertVSETVLI] Rework code structure to make reasoning about undefined lanes explicit [NFC]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152845: [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152810: [RISCV] Fix IMPLICIT_DEF check in doPeepholeMaskedRVV
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152810: [RISCV] Fix IMPLICIT_DEF check in doPeepholeMaskedRVV
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152845: [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152810: [RISCV] Fix IMPLICIT_DEF check in doPeepholeMaskedRVV
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152960: [RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152960: [RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152961: [RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152810: [RISCV] Fix IMPLICIT_DEF check in doPeepholeMaskedRVV
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152961: [RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152961: [RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC
Luke Lau via Phabricator via llvm-commits
- [PATCH] D153011: [RISCV] Add TU variants to VPseudoBinaryM. NFC
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Luke Lau via Phabricator via llvm-commits
- [PATCH] D153030: [RISCV] Add test cases for insert subvector shuffles for fixed vectors
Luke Lau via Phabricator via llvm-commits
- [PATCH] D152819: [X86][AMX] Let Store not be removed if combineCastStore failed
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D124378: [X86][AMX] combine tile cast and load/store instruction.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D124378: [X86][AMX] combine tile cast and load/store instruction.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D152631: [BOLT] Fix handling of code references from unmodified code
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152631: [BOLT] Fix handling of code references from unmodified code
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152748: [BOLT] Check dynamic relocations in analyzeJumpTable
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152751: [BOLT] Fix --max-funcs=<N> option
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D151899: [BOLT] Instrumentation: Initial instrumentation support for AArch64
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152751: [BOLT] Fix --max-funcs=<N> option
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152765: [BOLT][NFC] Change signature of MCPlusBuilder::isUnsupportedBranch()
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152765: [BOLT][NFC] Change signature of MCPlusBuilder::isUnsupportedBranch()
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152849: [BOLT][NFCI] Remove redundant instance of MCAsmBackend
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152849: [BOLT][NFCI] Remove redundant instance of MCAsmBackend
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152944: [BOLT] Mark sections read-only based on PT_GNU_RELRO segment
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152944: [BOLT] Set IsRelro section attribute based on PT_GNU_RELRO segment
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D130315: [BOLT][DWARF] Implement new mechanism for DWARFRewriter
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D151906: [BOLT][DWARF] Fix new debug re-writer
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D149548: [IR] Update to use new shufflevector semantics
Manuel Brito via Phabricator via llvm-commits
- [PATCH] D149548: [IR] Update to use new shufflevector semantics
Manuel Brito via Phabricator via llvm-commits
- [PATCH] D152658: [InstCombine] Change SimplifyDemandedVectorElts to use PoisonElts instead of UndefElts
Manuel Brito via Phabricator via llvm-commits
- [compiler-rt] 2c1ec06 - [compiler-rt] Disable interceptor trampoline for SPARC
Marco Elver via llvm-commits
- [PATCH] D153014: Deduplication of cyclic PHI nodes
Marek Sedláček via Phabricator via llvm-commits
- [PATCH] D153014: Deduplication of cyclic PHI nodes
Marek Sedláček via Phabricator via llvm-commits
- [PATCH] D153014: Deduplication of cyclic PHI nodes
Marek Sedláček via Phabricator via llvm-commits
- [PATCH] D152490: [llvm-profdata] Use StringRef for CallTargetMap
Mark Santaniello via Phabricator via llvm-commits
- [PATCH] D152490: [llvm-profdata] Use StringRef for CallTargetMap
Mark Santaniello via Phabricator via llvm-commits
- [llvm] 9c39400 - [CMake] Fixes using CMake 3.27.0.
Mark de Wever via llvm-commits
- [PATCH] D152619: [CMake] Fixes using CMake 3.27.0.
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D152619: [CMake] Fixes using CMake 3.27.0.
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D152619: [CMake] Fixes using CMake 3.27.0.
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D151664: [lit] Add a method to lit.TestFormat to get the list of tests associated to a path
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D151664: [lit] Add a method to lit.TestFormat to get the list of tests associated to a path
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D152696: Prevent deadlocks in death tests.
Martin Böhme via Phabricator via llvm-commits
- [PATCH] D152696: Prevent deadlocks in death tests.
Martin Böhme via Phabricator via llvm-commits
- [PATCH] D152696: Prevent deadlocks in death tests.
Martin Böhme via Phabricator via llvm-commits
- [PATCH] D152696: Prevent deadlocks in death tests.
Martin Böhme via Phabricator via llvm-commits
- [PATCH] D152856: [Driver] Allow warning for unclaimed TargetSpecific options
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D152856: [Driver] Allow warning for unclaimed TargetSpecific options
Martin Storsjö via Phabricator via llvm-commits
- [llvm] 7047cb5 - [AMDGPU] Trim trailing undefs from the end of image and buffer store
Mateja Marjanovic via llvm-commits
- [PATCH] D152440: [AMDGPU] Trim trailing undefs from the end of image and buffer store
Mateja Marjanovic via Phabricator via llvm-commits
- [PATCH] D152440: [AMDGPU] Trim trailing undefs from the end of image and buffer store
Mateja Marjanovic via Phabricator via llvm-commits
- [PATCH] D152440: [AMDGPU] Trim trailing undefs from the end of image and buffer store
Mateja Marjanovic via Phabricator via llvm-commits
- [llvm] ee19fab - LowerMemIntrinsics: Handle inserting addrspacecast for memmove lowering
Matt Arsenault via llvm-commits
- [llvm] eccc89b - AMDGPU: Add llvm.amdgcn.log intrinsic
Matt Arsenault via llvm-commits
- [llvm] 1269e45 - AMDGPU: Add baseline instcombine test for llvm.amdgcn.log
Matt Arsenault via llvm-commits
- [llvm] 10717f9 - AMDGPU: Add basic folds for llvm.amdgcn.log
Matt Arsenault via llvm-commits
- [llvm] 1f615b5 - AMDGPU: Modernize log codegen tests
Matt Arsenault via llvm-commits
- [llvm] d0923a7 - AMDGPU: Correct constants used in fast math log expansion
Matt Arsenault via llvm-commits
- [llvm] cdcbef1 - DAG: Fix typo in GET_FPENV legality check
Matt Arsenault via llvm-commits
- [llvm] a09f79d - TargetTransformInfo: Add addrspacesMayAlias
Matt Arsenault via llvm-commits
- [llvm] 0696240 - LowerMemIntrinsics: Check address space aliasing for memmove expansion
Matt Arsenault via llvm-commits
- [llvm] ed9285e - AMDGPU: Correct semantic bearing typo in intrinsic description
Matt Arsenault via llvm-commits
- [llvm] ccf216f - AMDGPU: Add llvm.amdgcn.log to intrinsic documentation
Matt Arsenault via llvm-commits
- [llvm] 28f3edd - AMDGPU: Add llvm.amdgcn.exp2 intrinsic
Matt Arsenault via llvm-commits
- [llvm] 6e934f2 - AMDGPU: Add baseline tests for llvm.amdgcn.exp2 folds
Matt Arsenault via llvm-commits
- [llvm] c6aaa0b - AMDGPU: Perform basic folds on llvm.amdgcn.exp2
Matt Arsenault via llvm-commits
- [llvm] 9348d83 - ValueTracking: Add some baseline tests for issue #63316
Matt Arsenault via llvm-commits
- [llvm] a632ca4 - ValueTracking: Fix nan result handling for fmul
Matt Arsenault via llvm-commits
- [llvm] f8cc1b6 - AMDGPU: Delete some stray / dead check prefixes
Matt Arsenault via llvm-commits
- [llvm] e3547bc - AMDGPU: Assume llvm.amdgcn.exp2 and log are canonicalizing
Matt Arsenault via llvm-commits
- [llvm] 8a257ae - LangRef: Delete trailing whitespace
Matt Arsenault via llvm-commits
- [llvm] 3928e2d - AMDGPU: Add baseline test for propagating amdgpu-waves-per-eu
Matt Arsenault via llvm-commits
- [llvm] b9c6d9e - AMDGPU: Propagate amdgpu-waves-per-eu with attributor
Matt Arsenault via llvm-commits
- [llvm] 7ed1aec - AMDGPU: Remove unnecessary Attributor overrides
Matt Arsenault via llvm-commits
- [llvm] 1159c67 - AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp
Matt Arsenault via llvm-commits
- [llvm] d9333e3 - Revert "AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp"
Matt Arsenault via llvm-commits
- [llvm] d61cba6 - UniformityAnalysis: Skip computation with no branch divergence
Matt Arsenault via llvm-commits
- [llvm] 12c12c5 - TTI: Add function to hasBranchDivergence
Matt Arsenault via llvm-commits
- [PATCH] D152697: AMDGPU: Add llvm.amdgcn.log intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152698: LowerMemIntrinsics: Handle inserting addrspacecast for memmove lowering
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152698: LowerMemIntrinsics: Handle inserting addrspacecast for memmove lowering
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152700: TargetTransformInfo: Add addrspacesMayAlias
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152701: LowerMemIntrinsics: Check address space aliasing for memmove expansion
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152702: AMDGPU: Add basic folds for llvm.amdgcn.log
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D115559: AMDGPU: Propagate amdgpu-waves-per-eu with attributor
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpenv.ll
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpenv.ll
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152700: TargetTransformInfo: Add addrspacesMayAlias
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152749: AMDGPU: Correct constants used in fast math log expansion
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152749: AMDGPU: Correct constants used in fast math log expansion
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152698: LowerMemIntrinsics: Handle inserting addrspacecast for memmove lowering
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152702: AMDGPU: Add basic folds for llvm.amdgcn.log
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152697: AMDGPU: Add llvm.amdgcn.log intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151887: InstSimplify: Start cleaning up simplifyFCmpInst
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152749: AMDGPU: Correct constants used in fast math log expansion
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152766: AMDGPU: Use correct lowering for llvm.log2.f32
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152794: [AMDGPU][GlobalISel] Shaders can only call amdgpu_gfx
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152805: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 5.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152766: AMDGPU: Use correct lowering for llvm.log2.f32
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152700: TargetTransformInfo: Add addrspacesMayAlias
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135579: utils/update_mir_test_checks.py: allow checking fixedStack in .mir files
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136676: [AMDGPU] Speedup SIFormMemoryClauses live-in register set calculation
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D148575: ValueTracking: Handle cannotBeOrderedLessThanZero for fadd
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151369: ValueTracking: Handle compare to nan and -inf constants in fcmpToClassTest
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152701: LowerMemIntrinsics: Check address space aliasing for memmove expansion
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152901: AMDGPU: Add llvm.amdgcn.exp2 intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152910: AMDGPU: Perform basic folds on llvm.amdgcn.exp2
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152901: AMDGPU: Add llvm.amdgcn.exp2 intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152901: AMDGPU: Add llvm.amdgcn.exp2 intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152901: AMDGPU: Add llvm.amdgcn.exp2 intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152901: AMDGPU: Add llvm.amdgcn.exp2 intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152957: ValueTracking: Fix nan result handling for fmul
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152925: [AMDGPU] Remove unused TableGen classes and multiclasses.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152925: [AMDGPU] Remove unused TableGen classes and multiclasses.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152899: Introduce RThreadAccess pass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152901: AMDGPU: Add llvm.amdgcn.exp2 intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152910: AMDGPU: Perform basic folds on llvm.amdgcn.exp2
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152957: ValueTracking: Fix nan result handling for fmul
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152957: ValueTracking: Fix nan result handling for fmul
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152993: [VP][RISCV] Add vp.fpclass and RISC-V support
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152957: ValueTracking: Fix nan result handling for fmul
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpenv
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153022: AMDGPU: Use correct lowering for llvm.log2.f32
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153023: AMDGPU: Correctly lower llvm.log.f32 and llvm.log10.f32
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153024: AMDGPU: Correctly lower llvm.exp2.f32
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153025: AMDGPU: Correctly lower llvm.exp.f32
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152909: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 16.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152904: [AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 11.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D82525: [FPEnv] Intrinsics for access to FP control modes
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153047: [AMDGPU] Stop replacing amdgcn.ballot(1) with amdgcn.s.getreg(exec)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D115559: AMDGPU: Propagate amdgpu-waves-per-eu with attributor
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D115559: AMDGPU: Propagate amdgpu-waves-per-eu with attributor
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153023: AMDGPU: Correctly lower llvm.log.f32 and llvm.log10.f32
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153025: AMDGPU: Correctly lower llvm.exp.f32
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153084: AMDGPU: Partially fix not respecting dynamic denormal mode
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153089: ValueTracking: Recognize fpclass clamping select patterns
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153151: [EarlyCSE] Do not CSE convergent readnone calls
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153158: AMDGPU: Implement llvm.get.rounding
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153158: AMDGPU: Implement llvm.get.rounding
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D115559: AMDGPU: Propagate amdgpu-waves-per-eu with attributor
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D149715: IR: Add llvm.frexp intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150765: InstCombine: Fold select of ldexp to ldexp of select
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D149589: AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153164: [AArch64][GlobalISel] Select G_UADDE/G_SADDE/G_USUBE/G_SSUBE
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153151: [EarlyCSE] Do not CSE convergent readnone calls
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D145211: Relax cross-section branches
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151986: UniformityAnalysis: Skip computation with no branch divergence
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151987: TTI: Add function to hasBranchDivergence
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151341: AMDGPU: Special case uniformity info for single lane workgroups
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153180: [docs][TableGen][Target] Improve the documentation of the attribute value for SubtargetFeature.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D152790: [ARM] Fix codegen of unaligned volatile load/store of i64
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D152790: [ARM] Fix codegen of unaligned volatile load/store of i64
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D152790: [ARM] Fix codegen of unaligned volatile load/store of i64
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable
Mel Chen via Phabricator via llvm-commits
- [PATCH] D144999: [Clang][MC][MachO]Only emits compact-unwind format for "canonical" personality symbols. For the rest, use DWARFs.
Michael Buch via Phabricator via llvm-commits
- [PATCH] D144999: [Clang][MC][MachO]Only emits compact-unwind format for "canonical" personality symbols. For the rest, use DWARFs.
Michael Buch via Phabricator via llvm-commits
- [PATCH] D147066: [DWARFLinker][DWARFv5] Add handling of DW_OP_addrx and DW_OP_constx expression operands.
Michael Buch via Phabricator via llvm-commits
- [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D149679: [SPIR-V] [WIP] Convert tests to opaque pointers
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D152696: Prevent deadlocks in death tests.
Michał Górny via Phabricator via llvm-commits
- [llvm] 6afe9f3 - [test][SLPVectorizer] Precommit testcase showing debug info affects codegen
Mikael Holmen via llvm-commits
- [llvm] ac9b9e3 - [SLPVectorizer] Don't include isAssumeLikeIntrinsics in ScheduleRegionSize
Mikael Holmen via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include debug instructions in ScheduleRegionSize
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152705: [test][SLPVectorizer] Precommit testcase showing debug info affects codegen
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include debug instructions in ScheduleRegionSize
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D141712: [GVN] Improve PRE on load instructions
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D141712: [GVN] Improve PRE on load instructions
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152705: [test][SLPVectorizer] Precommit testcase showing debug info affects codegen
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include debug instructions in ScheduleRegionSize
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D149209: [StructuralHash] Track global variables
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D151068: [Scalarizer] Fix for vector bitcasts of different element numbers
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include debug instructions in ScheduleRegionSize
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include isAssumeLikeIntrinsics in ScheduleRegionSize
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152441: [SLPVectorizer] Don't include isAssumeLikeIntrinsics in ScheduleRegionSize
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D151698: [SCEV] Compute AddRec range computations using different type BECount
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152541: [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D152541: [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D149435: [LCSSA] Don't invalidate SCEV
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D138451: [lld/mac] Add support for distributed ThinLTO
Mike Hommey via Phabricator via llvm-commits
- [llvm] d018958 - [RISCV] Fold binary op into select if profitable.
Mikhail Gudim via llvm-commits
- [PATCH] D152147: [RISCV] Fold binary op into select if profitable.
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D153044: [RISCV] Removed the requirement of XLenVT for performSELECTCombine
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D152147: [RISCV] Fold binary op into select if profitable.
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D153044: [RISCV] Removed the requirement of XLenVT for performSELECTCombine
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D153044: [RISCV] Removed the requirement of XLenVT for performSELECTCombine
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D152745: [Docs]Mention DTEST_SUITE_USE_IR_PGO O explicitly for LLLVM IR PGO in llvm-test-suite PGO testing
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D152745: [Docs] Update llvm-test-suite PGO instructions to use LLVM IR PGO by default
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D153154: [Inliner]Use a hybrid of cost-benefit and cost-threshold analysis.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D152745: [Docs]Mention DTEST_SUITE_USE_IR_PGO O explicitly for LLLVM IR PGO in llvm-test-suite PGO testing
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D152869: [nfc] moved SectionFilterIterator for improved reusability
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D152921: [lld] Synthesize metadata for MTE globals
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D152984: [scudo] Disable OddEvenTags by default.
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D150384: [CodeGenPrepare] Fix for using outdated/corrupt LoopInfo
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143897: [CodeGenPrepare] Estimate liveness of loop invariants when checking for address folding profitability
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D152827: [AArch64] Correctly determine if {ADD,SUB}{W,X}rs instructions are cheap
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143898: [CodeGenPrepare] Relax conditions for folding addressing mode into loads/stores
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143898: [CodeGenPrepare] Relax conditions for folding addressing mode into loads/stores
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D150384: [CodeGenPrepare] Fix for using outdated/corrupt LoopInfo
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D150384: [CodeGenPrepare] Fix for using outdated/corrupt LoopInfo
Momchil Velikov via Phabricator via llvm-commits
- [llvm] 5bb9bf5 - [SampleFDO] Remove 'using namespace' (NFC)
Muhammad Asif Manzoor via llvm-commits
- [PATCH] D152727: [SampleFDO] Remove 'using namespace' (NFC)
Muhammad Asif Manzoor via Phabricator via llvm-commits
- [PATCH] D152727: [SampleFDO] Remove 'using namespace' (NFC)
Muhammad Asif Manzoor via Phabricator via llvm-commits
- [llvm] 7400bdc - pr62660-normalization-failure.ll REQUIRES: asserts (#62660)
NAKAMURA Takumi via llvm-commits
- [PATCH] D141712: [GVN] Improve PRE on load instructions
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D150923: [KnownBits] Factor out and improve the lowbit computation for {u,s}div
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D147285: [Support] Extended llvm-profdata's merge functionality to exclude profiles from functions matching configurable patterns
NILANJANA BASU via Phabricator via llvm-commits
- [PATCH] D152911: [PowerPC] Remove extend between shift and and
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D149722: [AIX][TLS] Generate 64-bit local-exec access code sequence
Nemanja Ivanovic via Phabricator via llvm-commits
- [llvm] e0f7b0e - [SystemZ][z/OS] Correct value of length/4 of params field in PPA1.
Neumann Hon via llvm-commits
- [llvm] 049324a - Revert "[SystemZ][z/OS] Correct value of length/4 of params field in PPA1."
Neumann Hon via llvm-commits
- [llvm] 8a7a2da - [SystemZ][z/OS] Correct value of length/4 of params field in PPA1.
Neumann Hon via llvm-commits
- [PATCH] D152920: [SystemZ][z/OS] Correct value of length/4 of params field in PPA1.
Neumann Hon via Phabricator via llvm-commits
- [PATCH] D152920: [SystemZ][z/OS] Correct value of length/4 of params field in PPA1.
Neumann Hon via Phabricator via llvm-commits
- [PATCH] D152920: [SystemZ][z/OS] Correct value of length/4 of params field in PPA1.
Neumann Hon via Phabricator via llvm-commits
- [PATCH] D152945: [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFWriter
Neumann Hon via Phabricator via llvm-commits
- [PATCH] D149895: [SystemZ][z/OS] Remove ENDRecord class from GOFF.h
Neumann Hon via Phabricator via llvm-commits
- [PATCH] D152022: [CodeGen] Add support for reductions in ComplexDeinterleaving pass
Nicholas Guy via Phabricator via llvm-commits
- [PATCH] D152025: [CodeGen] Add pre-commit tests for D152022
Nicholas Guy via Phabricator via llvm-commits
- [PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.
Nick Desaulniers via Phabricator via llvm-commits
- [llvm] 7b31d3d - Revert "[RDF] Allow RegisterRef to contain register unit" and follow-ups
Nico Weber via llvm-commits
- [llvm] 9239cde - [gn build] Port 2700da5fe28d (lld/unittests etc)
Nico Weber via llvm-commits
- [llvm] 4de6714 - [gn] Fix case of directory I added in 9239cde390e
Nico Weber via llvm-commits
- [llvm] d76b37e - Revert "[gn build] Port 2700da5fe28d (lld/unittests etc)"
Nico Weber via llvm-commits
- [llvm] d3afe6a - [gn] port 80e4ccab794c
Nico Weber via llvm-commits
- [llvm] 3fc4c0a - [gn] port 98f70e94e0592
Nico Weber via llvm-commits
- [llvm] 2036fe7 - [gn] port 05634f7346a5 (bolt -> JITLink)
Nico Weber via llvm-commits
- [llvm] 5e97a91 - [gn] fix build after 992cb98462ab
Nico Weber via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Nico Weber via Phabricator via llvm-commits
- [PATCH] D152885: [lld] Make lit files relocatable
Nico Weber via Phabricator via llvm-commits
- [PATCH] D153162: [dsymutil] Fix .debug_addr index calculation
Nico Weber via Phabricator via llvm-commits
- [llvm] 2cb5c6d - Scalarizer: limit scalarization for small element types
Nicolai Hähnle via llvm-commits
- [PATCH] D151997: [AMDGPU] Document amdgpu_cs_chain[_preserve] CCs. NFC
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D151997: [AMDGPU] Document amdgpu_cs_chain[_preserve] CCs. NFC
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D149842: Scalarizer: limit scalarization for small element types
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D149842: Scalarizer: limit scalarization for small element types
Nicolai Hähnle via Phabricator via llvm-commits
- [llvm] 5c6ff3a - [DAGCombine] Move setcc of freeze fold to brcond
Nikita Popov via llvm-commits
- [llvm] 9cf67f6 - [LoopVectorize] Convert most tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] aa92ae5 - [LoopVectorize] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] 9929f95 - [LoopVectorize] Convert test to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 2b7c347 - [LoopVectorize] Convert test to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 282324a - [GVN] Fix verifyRemoved() verification
Nikita Popov via llvm-commits
- [llvm] f7a977c - [InstCombine] Revisit user of newly one-use instructions
Nikita Popov via llvm-commits
- [llvm] 09d6fa7 - [InstCombine] Handle use count decrement in more cases
Nikita Popov via llvm-commits
- [llvm] bf97797 - [PhaseOrdering] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] 57a8ea8 - [InstCombine] Avoid infinite loop in insert/extract combine
Nikita Popov via llvm-commits
- [llvm] 4c095f9 - [InstCombine] Add tests for binop of shift fold (NFC)
Nikita Popov via llvm-commits
- [llvm] 0b01fa7 - [InstCombine] Add additional tests for displaced shifts (NFC)
Nikita Popov via llvm-commits
- [llvm] 3210cc9 - [X86] Add test for icmp/sub operand order across blocks (NFC)
Nikita Popov via llvm-commits
- [llvm] 03de1cb - [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
Nikita Popov via llvm-commits
- [llvm] f10103b - [InstCombine] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] f9f8517 - [InstCombine][AArch64] Fix phi insertion point
Nikita Popov via llvm-commits
- [llvm] b7bd3a7 - [CGP] Fix infinite loop in icmp operand swapping
Nikita Popov via llvm-commits
- [PATCH] D152677: [InstCombine] If there is a known-bit transform is_pow2 check to just check for any other bits
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152673: [InstCombine] Canonicalize `(X^(X-1)) u{ge, lt} X` as pow2 test
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152659: [LV] Add IRBuilder folder to simplify GEP x, 0.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152646: [ValueTracking] More unsigned binary op implied conditions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152544: [DAGCombine] Move setcc of freeze fold to brcond
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152698: LowerMemIntrinsics: Handle inserting addrspacecast for memmove lowering
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152700: TargetTransformInfo: Add addrspacesMayAlias
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D141712: [GVN] Improve PRE on load instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152718: [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152718: [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152718: [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152700: TargetTransformInfo: Add addrspacesMayAlias
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152357: MachineConstantPool::getConstantPoolIndex - don't reuse mismatched constants contained undef/poison (Issue #63108)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152673: [InstCombine] Canonicalize `(X^(X-1)) u{ge, lt} X` as pow2 test
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152672: [InstCombine] Add tests for canonicalizing `(X^(X-1)) u{ge,lt} X` as pow2 test; NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152567: [InstCombine] Add tests for (binop (binop (lshift X,Amt),Mask),(lshift Y,Amt)); NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152744: [DSE] Don't eagerly optimize MemorySSA uses
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151911: [LVI] Handle icmp of ashr.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152774: [CVP] Don't process sext or ashr if value state including undefsimilar to D152773
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152773: [SCCP] Propagate undef when visiting some instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D147968: [TTI][BPF]: Undo specific transform-preventing passes and add one TTI hook
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152781: [NFC][BlockFrequency] Move operator definitions into header
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152744: [DSE] Don't eagerly optimize MemorySSA uses
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152600: [InstCombine] Add target option to bail scalarization
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150858: [UpdateTestChecks] Add preprocess_cmd in update_analyze_test_checks.py
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149209: [StructuralHash] Track global variables
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151916: [DAG] Peek through any trunc/zext when combining select into shifts.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142823: Intrinsics: Allow tablegen to mark parameters with dereferenceable
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151677: [SimpleLoopUnswitch] Unswitch AND/OR conditions of selects
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152434: [BBUtils] Don't add 'then' block to a loop if it's terminated with unreachable
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150542: [ValueTracking] Ensure isGuaranteedNotToBeUndefOrPoison scans CtxI's parent basic block if CtxI is given
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152743: [AliasAnalysis] Return NoModRef for loads from constant memory
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152876: [InstCombine] Expand `foldBinOpShiftWithShift` to handle multiple binops
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151807: [InstCombine] Revisit user of newly one-use instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151677: [SimpleLoopUnswitch] Unswitch AND/OR conditions of selects
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151807: [InstCombine] Revisit user of newly one-use instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152927: [InstCombine] Fold binop op shifts with related amounts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152927: [InstCombine] Fold binop op shifts with related amounts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152859: [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152927: [InstCombine] Fold binop op shifts with related amounts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152927: [InstCombine] Fold binop of shifts with related amounts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152541: [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152541: [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152541: [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153041: [InstCombine] Verify CmpInst is equality in `foldICmpPow2Test`; PR63327
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153090: [OCaml] Rename link_modules' to link_modules
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152541: [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153145: [LCSSA] Compute SCEV of LCSSA phi if original instruction had SCEV
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149435: [LCSSA] Don't invalidate SCEV
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153014: Deduplication of cyclic PHI nodes
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153014: Deduplication of cyclic PHI nodes
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153190: [UpdateTestChecks] Add update test check support for fpmath metadata
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153151: [EarlyCSE] Do not CSE convergent readnone calls
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + zext(B)) & X` into `B ? 0 : X` where B is effectively a bool
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153215: [Object] Add ELF section type SHT_LLVM_LTO for fat LTO
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151799: [ConstraintElim] Try to use first cmp to prove second cmp for ANDs.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.
Nikita Popov via Phabricator via llvm-commits
- [llvm] a986998 - [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj via Phabricator via llvm-commits
- [llvm] 4e2b532 - [X86] Add tests for optimizing out zero-check in is_pow2 setcc pattern; NFC
Noah Goldstein via llvm-commits
- [llvm] 5c8188c - [DAGCombine] Use `IsKnownNeverZero` to see if we need zero-check in is_pow2 setcc patern
Noah Goldstein via llvm-commits
- [llvm] 758ffdb - [InstCombine] Factor out power of 2 comparison patterns to helper; NFC
Noah Goldstein via llvm-commits
- [llvm] 4fa971f - [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via llvm-commits
- [llvm] b76bd2d - 100 checks
Noah Goldstein via llvm-commits
- [llvm] 94cf2c0 - Revert "100 checks"
Noah Goldstein via llvm-commits
- [llvm] 3391bdc - Revert "[FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)"
Noah Goldstein via llvm-commits
- [llvm] 335c0f7 - [FunctionAttrs] Remove errant whitespace; NFC
Noah Goldstein via llvm-commits
- [llvm] b7f34ce - [InstCombine] Add tests for (binop (binop (lshift X,Amt),Mask),(lshift Y,Amt)); NFC
Noah Goldstein via llvm-commits
- [llvm] 91cdffc - [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Noah Goldstein via llvm-commits
- [llvm] e92a27b - [InstCombine] Verify CmpInst is equality in `foldICmpPow2Test`; PR63327
Noah Goldstein via llvm-commits
- [PATCH] D151807: [InstCombine] Revisit user of newly one-use instructions
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152357: MachineConstantPool::getConstantPoolIndex - don't reuse mismatched constants contained undef/poison (Issue #63108)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152728: [InstCombine] Factor out power of 2 comparison patterns to helper; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152672: [InstCombine] Add tests for canonicalizing `(X^(X-1)) u{ge,lt} X` as pow2 test; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152673: [InstCombine] Canonicalize `(X^(X-1)) u{ge, lt} X` as pow2 test
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152673: [InstCombine] Canonicalize `(X^(X-1)) u{ge, lt} X` as pow2 test
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152676: [InstCombine] Add tests for ispow2 comparisons with a known bit; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152677: [InstCombine] If there is a known-bit transform is_pow2 check to just check for any other bits
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152677: [InstCombine] If there is a known-bit transform is_pow2 check to just check for any other bits
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152728: [InstCombine] Factor out power of 2 comparison patterns to helper; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152567: [InstCombine] Add tests for (binop (binop (lshift X,Amt),Mask),(lshift Y,Amt)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152674: [X86] Add tests for optimizing out zero-check in is_pow2 setcc pattern; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152675: [DAGCombine] Use `IsKnownNeverZero` to see if we need zero-check in is_pow2 setcc patern
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152728: [InstCombine] Factor out power of 2 comparison patterns to helper; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152567: [InstCombine] Add tests for (binop (binop (lshift X,Amt),Mask),(lshift Y,Amt)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152672: [InstCombine] Add tests for canonicalizing `(X^(X-1)) u{ge,lt} X` as pow2 test; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152673: [InstCombine] Canonicalize `(X^(X-1)) u{ge, lt} X` as pow2 test
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152676: [InstCombine] Add tests for ispow2 comparisons with a known bit; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152677: [InstCombine] If there is a known-bit transform is_pow2 check to just check for any other bits
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152567: [InstCombine] Add tests for (binop (binop (lshift X,Amt),Mask),(lshift Y,Amt)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152567: [InstCombine] Add tests for (binop (binop (lshift X,Amt),Mask),(lshift Y,Amt)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152568: [InstCombine] Transform `(binop1 (binop2 (lshift X,Amt),Mask),(lshift Y,Amt))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152875: [InstCombine] Add tests for folding shift across multiple binops; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152876: [InstCombine] Expand `foldBinOpShiftWithShift` to handle multiple binops
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152876: [InstCombine] Expand `foldBinOpShiftWithShift` to handle multiple binops
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152927: [InstCombine] Fold binop op shifts with related amounts
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152927: [InstCombine] Fold binop op shifts with related amounts
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152838: [ValueTracking] Add range computation from dominating conditions
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D152226: [FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D153041: [InstCombine] Verify CmpInst is equality in `foldICmpPow2Test`; PR63327
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D153041: [InstCombine] Verify CmpInst is equality in `foldICmpPow2Test`; PR63327
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + zext(B)) & X` into `B ? 0 : X` where B is effectively a bool
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + zext(B)) & X` into `B ? 0 : X` where B is effectively a bool
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149548: [IR] Update to use new shufflevector semantics
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D152798: [AMDGPU][ValueTracking] Handle amdgcn intrinsics that cannot create poison
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D93838: [SCCP] Add Function Specialization pass
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D153125: [lit] Likely fix for symlink path failures after D152709
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D152661: [XRay] Make xray_fn_idx entries PC-relative
Oleksii Lozovskyi via Phabricator via llvm-commits
- [PATCH] D152453: llvm-cov produces inconsistent result when file appears multiple times in gcno
Oleksii Odynochenko via Phabricator via llvm-commits
- [PATCH] D152453: llvm-cov produces inconsistent result when file appears multiple times in gcno
Oleksii Odynochenko via Phabricator via llvm-commits
- [PATCH] D152719: [NFC] Combine several DW_AT_const_value tests
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D151795: [DebugInfo] Add DW_ATE_complex_float case to assert in isUnsignedDIType
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D152719: [NFC] Combine several DW_AT_const_value tests
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D153207: [AArch64] Add patterns for scalar FMUL, FMULX, FMADD, FMSUB
OverMighty via Phabricator via llvm-commits
- [PATCH] D153207: [AArch64] Add patterns for scalar FMUL, FMULX, FMADD, FMSUB
OverMighty via Phabricator via llvm-commits
- [PATCH] D153207: [AArch64] Add patterns for scalar FMUL, FMULX, FMADD, FMSUB
OverMighty via Phabricator via llvm-commits
- [PATCH] D152059: [AVR] Replace shift-to-loop IR pass with common shift code
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D152059: [AVR] Replace shift-to-loop IR pass with common shift code
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D153197: [AVR] Expand shifts during AVRISelLowering
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D152059: [AVR] Replace shift-to-loop IR pass with common shift code
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D153197: [AVR] Expand shifts during AVRISelLowering
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D153197: [AVR] Expand shifts during AVRISelLowering
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146778: [lld] Preliminary fat-lto-object support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D152973: [gold] Add preliminary FatLTO support to the Gold plugin
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D152973: [gold] Add preliminary FatLTO support to the Gold plugin
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146778: [lld] Preliminary fat-lto-object support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D152973: [gold] Add preliminary FatLTO support to the Gold plugin
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D152973: [gold] Add preliminary FatLTO support to the Gold plugin
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146778: [lld] Preliminary fat-lto-object support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D152973: [gold] Add preliminary FatLTO support to the Gold plugin
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D149488: [RISCV] Use AMOSWAP for 32 and 64-bit atomic stores
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D153180: [docs][TableGen][Target] Improve the documentation of the attribute value for SubtargetFeature.
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D152282: [Transforms][LICM] A test case for the upcoming fix D152281 for the issue with reassociation profitability
Paul Osmialowski via Phabricator via llvm-commits
- [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation
Paul Osmialowski via Phabricator via llvm-commits
- [PATCH] D118754: [DebugInfo] Always emit `.debug_names` with dwarf 5 for Apple platforms
Paul Robinson via Phabricator via llvm-commits
- [llvm] 31c485c - [AArch64CompressJumpTables] Prevent over-compression caused by invalid alignment.
Paul Walker via llvm-commits
- [llvm] 7a8f6a3 - Increase test coverage of Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll
Paul Walker via llvm-commits
- [llvm] c7c71aa - [NFC][AArch64TTI] Breakout add/sub combines into discrete functions.
Paul Walker via llvm-commits
- [llvm] b7287a8 - [SVE][AArch64TTI] Fix invalid mla combine that miscomputes the value of inactive lanes.
Paul Walker via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
Paul Walker via Phabricator via llvm-commits
- [PATCH] D147678: [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
Paul Walker via Phabricator via llvm-commits
- [PATCH] D150009: [AArch64CompressJumpTables] Prevent over-compression when block alignment is bigger than function alignment.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D146218: [AArch64][CodeGen] Lower (de)interleave2 intrinsics to ld2/st2
Paul Walker via Phabricator via llvm-commits
- [PATCH] D146218: [AArch64][CodeGen] Lower (de)interleave2 intrinsics to ld2/st2
Paul Walker via Phabricator via llvm-commits
- [PATCH] D150009: [AArch64CompressJumpTables] Prevent over-compression caused by invalid alignment.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
Paul Walker via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
Paul Walker via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
Paul Walker via Phabricator via llvm-commits
- [PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent
Pavel Iliin via Phabricator via llvm-commits
- [llvm] 27f37db - [llvm-exegesis] Use MCJIT only for execution
Pavel Kosov via llvm-commits
- [PATCH] D148921: [llvm-exegesis] Use MCJIT only for execution
Pavel Kosov via Phabricator via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Paweł Bylica via Phabricator via llvm-commits
- [PATCH] D150870: [lld][Arm] Big Endian - Byte invariant support.
Peter Smith via Phabricator via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Peter Smith via Phabricator via llvm-commits
- [PATCH] D150870: [lld][Arm] Big Endian - Byte invariant support.
Peter Smith via Phabricator via llvm-commits
- [PATCH] D150870: [lld][Arm] Big Endian - Byte invariant support.
Peter Smith via Phabricator via llvm-commits
- [PATCH] D152841: Prevent out of range fixup encoding on AArch64
Peter Smith via Phabricator via llvm-commits
- [PATCH] D152843: Switch magic numbers to library functions in fixup
Peter Smith via Phabricator via llvm-commits
- [PATCH] D150870: [lld][Arm] Big Endian - Byte invariant support.
Peter Smith via Phabricator via llvm-commits
- [PATCH] D152170: [ELF] Fix early overflow check in finalizeAddressDependentContent
Peter Smith via Phabricator via llvm-commits
- [PATCH] D152921: [lld] Synthesize metadata for MTE globals
Peter Smith via Phabricator via llvm-commits
- [PATCH] D89492: [compiler-rt] Enable building builtins using top-level CMake file
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Phabricator via llvm-commits
- [PATCH] D152727: [SampleFDO] Remove 'using namespace' (NFC)
Phabricator via llvm-commits
- [llvm] d8562e2 - [RISCV] Canonicalize towards vmerge w/passthrough representation
Philip Reames via llvm-commits
- [llvm] 4a779a9 - [RISCV] Minor style changes to performCombineVMergeAndVOps [nfc]
Philip Reames via llvm-commits
- [llvm] cde91c6 - [RISCV] Canonicalize towards vid w/passthrough representation
Philip Reames via llvm-commits
- [llvm] 807adcf - [RISCV][InsertVSETVLI] Rework code structure to make reasoning about undefined lanes explicit [NFC]
Philip Reames via llvm-commits
- [llvm] 7f26c27 - [RISCV] Enable SLP by default (when vectors are available)
Philip Reames via llvm-commits
- [llvm] c4a3bd7 - [RISCV] Remove dead code from doPeepholeMaskedRVV [nfc]
Philip Reames via llvm-commits
- [llvm] fc9b264 - [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined
Philip Reames via llvm-commits
- [llvm] 95697de - [RISCV] Make all vector binops use the _TU pseudo form
Philip Reames via llvm-commits
- [llvm] 39e2232 - [RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC
Philip Reames via llvm-commits
- [llvm] b3137d5 - [RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC
Philip Reames via llvm-commits
- [llvm] 6f5932e - [RISCV] Add a policy operand to VPseudoBinaryNoMaskTU [NFC]
Philip Reames via llvm-commits
- [llvm] 6eb8c35 - [RISCV] Fix a latent miscompile in doPeepholeMaskedRVV
Philip Reames via llvm-commits
- [PATCH] D152565: [RISCV] Use tail undisturbed vmv.v.v instead of vslideup.vi vN, vM, 0 for subvector insertion
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152298: [RISCV] Use vslidedown.vi vN, vN, 0 instead of vslideup.vi vN, vM, 0 for subvector insertion
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152553: [RISCV] Use tail undisturbed vmv.v.v instead of vadd.vi with 0 for vp.merge with all ones mask.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152421: [RISCV] Introduce the concept of DLEN(data path width) into getLMULCost.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152050: [RISCV] Begin removing hasDummyMask.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152218: [RISCV] Remove HasDummyMask from tablegen files.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152380: [RISCV] Canonicalize towards vmerge w/passthrough representation
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152421: [RISCV] Introduce the concept of DLEN(data path width) into getLMULCost.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152740: [RISCV] Canonicalize towards vid w/passthrough representation
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152724: [RISCV] Use TU vmv.v.v instead of vslideup.vi N, M, 0 for insert vector_shuffles
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152750: [RISCV] Enable SLP by default (when vectors are available)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152001: [RISCV][SLP] Inflate insert/extract costs on very small vectors
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152723: [RISCV] Add support for llvm.prefetch to use Zicbop instructions.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152844: [RISCV][InsertVSETVLI] Rework code structure to make reasoning about undefined lanes explicit [NFC]
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152845: [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152845: [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152845: [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152810: [RISCV] Fix IMPLICIT_DEF check in doPeepholeMaskedRVV
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152380: [RISCV] Canonicalize towards vmerge w/passthrough representation
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152740: [RISCV] Canonicalize towards vid w/passthrough representation
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152844: [RISCV][InsertVSETVLI] Rework code structure to make reasoning about undefined lanes explicit [NFC]
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152750: [RISCV] Enable SLP by default (when vectors are available)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152810: [RISCV] Fix IMPLICIT_DEF check in doPeepholeMaskedRVV
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152961: [RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153067: [RISCV] Add a policy operand to VPseudoBinaryNoMaskTU [NFC]
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153070: [RISCV] Fix a latent miscompile in doPeepholeMaskedRVV
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152845: [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153076: [RISCV] Prevent vsetvli insertion from deleting some vsetvli instructions
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153155: [RISCV] Remove legacy TA/TU pseudo distiction for VID
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153155: [RISCV] Remove legacy TA/TU pseudo distiction for VID
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153155: [RISCV] Remove legacy TA/TU pseudo distiction for VID
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152960: [RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152961: [RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153067: [RISCV] Add a policy operand to VPseudoBinaryNoMaskTU [NFC]
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153070: [RISCV] Fix a latent miscompile in doPeepholeMaskedRVV
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Philip Reames via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Philip Reames via Phabricator via llvm-commits
- [llvm] 8561283 - [DAG] Unroll opereand when its type is illegal for ldexp.
Phoebe Wang via llvm-commits
- [PATCH] D152819: [X86][AMX] Let Store not be removed if combineCastStore failed
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D152997: [DAG] Unroll opereand when its type is illegal for ldexp.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D152997: [DAG] Unroll opereand when its type is illegal for ldexp.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D153104: [DAG] Unroll and expand illegal result of LDEXP and POWI instead of widen.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D153104: [DAG] Unroll and expand illegal result of LDEXP and POWI instead of widen.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D153104: [DAG] Unroll and expand illegal result of LDEXP and POWI instead of widen.
Phoebe Wang via Phabricator via llvm-commits
- [llvm] 56bf960 - [CMake] Enable building with UBSAN + clang-cl on windows.
Pierre Gousseau via llvm-commits
- [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D59528: [clang-tidy] Expand modular headers for PPCallbacks
Piotr Zegar via Phabricator via llvm-commits
- [llvm] fc4350c - [NFC][RISCV] rename findFirstNonVersionCharacter with findLastNonVersionCharacter
Piyou Chen via llvm-commits
- [PATCH] D152506: [NFC][RISCV] rename findFirstNonVersionCharacter with findLastNonVersionCharacter
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D152506: [NFC][RISCV] rename findFirstNonVersionCharacter with findLastNonVersionCharacter
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D152423: [RISCV] Add function that check extension name with version
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D153061: docs: fix link for static constructors article
Prajwal S N via Phabricator via llvm-commits
- [llvm] 03d9250 - [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Pravin Jagtap via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer by default.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D153007: [AMDGPU] Switch to the new cl option amdgpu-atomic-optimizer-strategy.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D153007: [AMDGPU] Switch to the new cl option amdgpu-atomic-optimizer-strategy.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D152714: [AArch64][Optimization]Solving the FCCMP issue
Priyanshi Agarwal via Phabricator via llvm-commits
- [PATCH] D152714: [AArch64][Optimization]Solving the FCCMP issue
Priyanshi Agarwal via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for XCVmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for XCVmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for XCVmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152821: [RISCV] Add support for XCVmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as`
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D152213: ShrinkWrap: Ignore load/store until stack address computation
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D152731: [BOLT] Sort BranchData in DataAggregator
Rafael Auler via Phabricator via llvm-commits
- [PATCH] D150671: RISCV/InstrInfo: model register pressure for MICombiner
Ramkumar Ramachandra via Phabricator via llvm-commits
- [PATCH] D152693: LoopVectorize: introduce RecurKind::Induction(I|F)(Max|Min)
Ramkumar Ramachandra via Phabricator via llvm-commits
- [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable
Ramkumar Ramachandra via Phabricator via llvm-commits
- [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable
Ramkumar Ramachandra via Phabricator via llvm-commits
- [PATCH] D143465: [LoopVectorize] Vectorize the reduction pattern of integer min/max with index.
Ramkumar Ramachandra via Phabricator via llvm-commits
- [PATCH] D86338: Remove TaskQueue
Raphael Isemann via Phabricator via llvm-commits
- [PATCH] D86338: Remove TaskQueue
Raphael Isemann via Phabricator via llvm-commits
- [PATCH] D151972: [flang][openacc] Add parsing support for dim in gang clause
Razvan Lupusoru via Phabricator via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D153020: [X86] Fix callee side of receiving byval args on the stack
Reid Kleckner via Phabricator via llvm-commits
- [llvm] 887362d - [AArch64] Neoverse V2 scheduling model
Ricardo Jesus via llvm-commits
- [PATCH] D151894: [AArch64] Neoverse V2 scheduling model
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D151894: [AArch64] Neoverse V2 scheduling model
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D151894: [AArch64] Neoverse V2 scheduling model
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D152826: [AArch64] Improve shuffles of i1 vectors (WIP)
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D152826: [AArch64] Improve shuffles of i1 vectors (WIP)
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D151894: [AArch64] Neoverse V2 scheduling model
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D151894: [AArch64] Neoverse V2 scheduling model
Ricardo Jesus via Phabricator via llvm-commits
- [llvm] 639e411 - [Orc][Coff] Skip registration of voltbl sections
River Riddle via llvm-commits
- [PATCH] D152574: [Orc][Coff] Skip registration of voltbl sections
River Riddle via Phabricator via llvm-commits
- [PATCH] D152574: [Orc][Coff] Skip registration of voltbl sections
River Riddle via Phabricator via llvm-commits
- [PATCH] D153073: [LLDB] Add DWARF definitions for the new Mojo language
River Riddle via Phabricator via llvm-commits
- [PATCH] D150482: [AArch64] Don't use tbl lowering if ZExt can be folded into user.
Robert Dazi via Phabricator via llvm-commits
- [PATCH] D152954: [RISCV] Treat __riscv_vsetvl_*(-1) as vlmax.
Roger Ferrer Ibanez via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Roger Ferrer Ibanez via Phabricator via llvm-commits
- [compiler-rt] 42564f9 - [fuzzer][fuchsia] Support RISC-V
Roland McGrath via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D129818: AMDGPU: Make default AMDHSA Code Object Version to be 5
Saiyedul Islam via Phabricator via llvm-commits
- [llvm] c1cf459 - [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Saleem Abdulrasool via llvm-commits
- [llvm] e944f4c - Revert "[lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows"
Saleem Abdulrasool via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Saleem Abdulrasool via Phabricator via llvm-commits
- [PATCH] D153138: [lit] Revert migration from os.path.realpath to os.path.abspath
Saleem Abdulrasool via Phabricator via llvm-commits
- [PATCH] D153138: [lit] Revert migration from os.path.realpath to os.path.abspath
Saleem Abdulrasool via Phabricator via llvm-commits
- [PATCH] D150803: Add a new `wasm_custom` clang attribute for marking functions.
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D150803: Add a new `wasm_custom` clang attribute for marking functions.
Sam Clegg via Phabricator via llvm-commits
- [compiler-rt] 63eb7c4 - [scudo] Do not compile timing.cpp if LLVM_LIBC_INCLUDE_SCUDO=on
Sam James via llvm-commits
- [PATCH] D152619: [CMake] Fixes using CMake 3.27.0.
Sam James via Phabricator via llvm-commits
- [PATCH] D147116: [RFC] Introduce convergence control intrinsics
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D147116: [RFC] Introduce convergence control intrinsics
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D152431: [Inliner] Handle convergence control when inlining a call
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D152431: [Inliner] Handle convergence control when inlining a call
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D147116: [RFC] Introduce convergence control intrinsics
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D147116: [RFC] Introduce convergence control intrinsics
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [llvm] ce4bb08 - [KCFI] Fix hash offset calculation in Thumb mode
Sami Tolvanen via llvm-commits
- [PATCH] D152484: [KCFI] Fix hash offset calculation in Thumb mode
Sami Tolvanen via Phabricator via llvm-commits
- [PATCH] D148385: [RISCV] Implement KCFI operand bundle lowering
Sami Tolvanen via Phabricator via llvm-commits
- [PATCH] D148385: [RISCV] Implement KCFI operand bundle lowering
Sami Tolvanen via Phabricator via llvm-commits
- [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive
Sandeep via Phabricator via llvm-commits
- [PATCH] D152608: GetClangResourceDir: Fix downstream projects that bundle llvm source
Sebastian Neubauer via Phabricator via llvm-commits
- [PATCH] D152892: [AMDGPU] Remove return VGPRs from callee save list
Sebastian Neubauer via Phabricator via llvm-commits
- [PATCH] D152912: [AMDGPU] Place returns on stack if they would violate VGPR limit
Sebastian Neubauer via Phabricator via llvm-commits
- [PATCH] D153223: [RL78 patch 1] Add RL78 ELF defintions
Sebastian Perta via Phabricator via llvm-commits
- [PATCH] D151047: [clang-format] Fix indentation for selective formatting.
Sedenion via Phabricator via llvm-commits
- [PATCH] D151047: [clang-format] Fix indentation for selective formatting.
Sedenion via Phabricator via llvm-commits
- [llvm] 8d1edae - Use SelectionDAGBuiler::getRoot instead of SelectionDAG::getRoot
Serge Pavlov via llvm-commits
- [llvm] 7dd387d - [clang] Add __builtin_isfpclass
Serge Pavlov via llvm-commits
- [PATCH] D152351: [clang] Add __builtin_isfpclass
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D152351: [clang] Add __builtin_isfpclass
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D153219: [symbolizer] Exit early if input file is absent
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D147652: [symbolizer] Check existence of input file in GNU mode
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D147652: [symbolizer] Check existence of input file in GNU mode
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D152351: [clang] Add __builtin_isfpclass
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D152351: [clang] Add __builtin_isfpclass
Serge Pavlov via Phabricator via llvm-commits
- [llvm] 6edfa61 - [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Sergei Barannikov via llvm-commits
- [llvm] aa2d0fb - [MC] Add MCRegisterInfo::regunits for iteration over register units
Sergei Barannikov via llvm-commits
- [llvm] b70b96c - [RegAlloc] Simplify RegAllocEvictionAdvisor::canReassign (NFC)
Sergei Barannikov via llvm-commits
- [llvm] 992cb98 - [clang][CodeGen] Break up TargetInfo.cpp [8/8]
Sergei Barannikov via llvm-commits
- [PATCH] D150511: [llvm] Fix include guards
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152098: [MC] Add MCRegisterInfo::regunits for iteration over register units
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152098: [MC] Add MCRegisterInfo::regunits for iteration over register units
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D144936: [SPARC][IAS] Recognize more SPARCv9 instructions/pseudoinstructions
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152098: [MC] Add MCRegisterInfo::regunits for iteration over register units
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152098: [MC] Add MCRegisterInfo::regunits for iteration over register units
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152655: [MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152098: [MC] Add MCRegisterInfo::regunits for iteration over register units
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152665: [RegAlloc] Simplify RegAllocEvictionAdvisor::canReassign (NFC)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153097: [RISCV] Make linker-relaxable instructions terminate MCDataFragment
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153097: [RISCV] Make linker-relaxable instructions terminate MCDataFragment
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153097: [RISCV] Make linker-relaxable instructions terminate MCDataFragment
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153096: [MC] Fold A-B when A's fragment precedes B's fragment
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153097: [RISCV] Make linker-relaxable instructions terminate MCDataFragment
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153122: [MC] Use regunits instead of MCRegUnitIterator. NFC.
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153122: [MC] Use regunits instead of MCRegUnitIterator. NFC.
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D148094: [clang][CodeGen] Break up TargetInfo.cpp [8/8]
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D148094: [clang][CodeGen] Break up TargetInfo.cpp [8/8]
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153204: RISCVAsmParser: support comments in more places
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153008: [RISCV] Allow slash-star comments in instruction operands
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152217: [profi][NFC] Refactor SampleProfileInference::apply
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D152833: A new code layout algorithm for function reordering [1/3]
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D152834: A new code layout algorithm for function reordering [2/3]
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D152840: A new code layout algorithm for function reordering [3a/3]
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D152959: [BOLT] Fix sorting functions by execution count
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D147218: [OpenMP][Flang][MLIR] Lowering of OpenMP requires directive from parse tree to MLIR
Sergio Afonso via Phabricator via llvm-commits
- [PATCH] D147218: [OpenMP][Flang][MLIR] Lowering of OpenMP requires directive from parse tree to MLIR
Sergio Afonso via Phabricator via llvm-commits
- [PATCH] D147218: [OpenMP][Flang][MLIR] Lowering of OpenMP requires directive from parse tree to MLIR
Sergio Afonso via Phabricator via llvm-commits
- [PATCH] D147218: [OpenMP][Flang][MLIR] Lowering of OpenMP requires directive from parse tree to MLIR
Sergio Afonso via Phabricator via llvm-commits
- [llvm] d119c38 - [CGP] Additional tests for removing operand of assume. NFC.
Serguei Katkov via llvm-commits
- [PATCH] D152358: [CGP] Remove operand of llvm.assume more aggressively.
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D152358: [CGP] Remove operand of llvm.assume more aggressively.
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D152358: [CGP] Remove operand of llvm.assume more aggressively.
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D152890: [RISCV] Reduce the number of ExtInfo_rr permutations in tablegen.
Shao-Ce SUN via Phabricator via llvm-commits
- [PATCH] D152948: [RISCV] Refactor how we create separate instructions for F and Zfinx. NFC
Shao-Ce SUN via Phabricator via llvm-commits
- [PATCH] D152952: [RISCV] Remove fcvt.d.l(u) and fcvt.l(u).d instructions with _IN32X suffix.
Shao-Ce SUN via Phabricator via llvm-commits
- [PATCH] D152948: [RISCV] Refactor how we create separate instructions for F and Zfinx. NFC
Shao-Ce SUN via Phabricator via llvm-commits
- [PATCH] D152941: [BOLT] Fixing relative ordering of cold sections under multi-way function splitting
Shatian Wang via Phabricator via llvm-commits
- [PATCH] D152941: [BOLT] Fixing relative ordering of cold sections under multi-way function splitting
Shatian Wang via Phabricator via llvm-commits
- [PATCH] D152941: [BOLT] Fixing relative ordering of cold sections under multi-way function splitting
Shatian Wang via Phabricator via llvm-commits
- [PATCH] D153103: [m68k] Fix incorrect handling of TLS when matching addressing mode.
Sheng via Phabricator via llvm-commits
- [PATCH] D152929: [lld-macho] Switch to new tool ID
Shoaib Meenai via Phabricator via llvm-commits
- [PATCH] D153098: [AArch64] Emit fewer CFI instructions for synchronous unwind tables
Shoaib Meenai via Phabricator via llvm-commits
- [llvm] 6c1740f - Add dsymutil dwarf5 tests for darwin
Shubham Sandeep Rastogi via llvm-commits
- [PATCH] D151932: Add dsymutil dwarf5 tests for darwin
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- [PATCH] D151932: Add dsymutil dwarf5 tests for darwin
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D153080: Emit DW_LLE_base_address + DW_LLE_offset_pairs instead of DW_LLE_start_length in debug_loclists section
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D150870: [lld][Arm] Big Endian - Byte invariant support.
Simi Pallipurath via Phabricator via llvm-commits
- [PATCH] D150870: [lld][Arm] Big Endian - Byte invariant support.
Simi Pallipurath via Phabricator via llvm-commits
- [PATCH] D150870: [lld][Arm] Big Endian - Byte invariant support.
Simi Pallipurath via Phabricator via llvm-commits
- [PATCH] D150870: [lld][Arm] Big Endian - Byte invariant support.
Simi Pallipurath via Phabricator via llvm-commits
- [llvm] 1a576aa - [GlobalIsel][X86] Rename x86_64-legalize-fcmp to legalize-fcmp
Simon Pilgrim via llvm-commits
- [llvm] 6a12ab8 - [GlobalIsel][X86] Regenerate legalize-fcmp.mir
Simon Pilgrim via llvm-commits
- [llvm] 22c17c6 - [GlobalIsel][X86] Move G_FCMP getActionDefinitionsBuilder out of setLegalizerInfo64bit and add 32-bit support
Simon Pilgrim via llvm-commits
- [llvm] 3d34f7b - [GlobalIsel][X86] Rename x86_64-select-fcmp.mir to select-fcmp.mir and add 32-bit test coverage
Simon Pilgrim via llvm-commits
- [llvm] 1baa5b8 - [GlobalIsel][X86] Move G_SITOFP/G_FPTOSI getActionDefinitionsBuilder out of setLegalizerInfo64bit and add basic 32-bit support
Simon Pilgrim via llvm-commits
- [llvm] 35def30 - [GlobalIsel][X86] Regenerate legalize-phi.mir
Simon Pilgrim via llvm-commits
- [llvm] 7fcc35b - [GlobalIsel][X86] Update legalization of G_PHI/G_BRCOND
Simon Pilgrim via llvm-commits
- [llvm] e61bb1e - MachineConstantPool::getConstantPoolIndex - don't reuse mismatched constants contained undef/poison (Issue #63108)
Simon Pilgrim via llvm-commits
- [llvm] 834cc88 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets (REAPPLIED)
Simon Pilgrim via llvm-commits
- [llvm] 4cbedae - [LoopVectorize][X86] Regenerate slm-no-vectorize.ll
Simon Pilgrim via llvm-commits
- [llvm] 7aa52f3 - [CostModel][X86] Add test coverage for vXi64 multiplies of sign/zero-extended vector
Simon Pilgrim via llvm-commits
- [llvm] c1f81ac - [SLP][X86] Add test coverage for Issue #62969
Simon Pilgrim via llvm-commits
- [llvm] e64f914 - [TTI][X86] Recognise PMULUDQ costs for vXi64 multiplies
Simon Pilgrim via llvm-commits
- [llvm] 595a743 - [CostModel][X86] Tweak SSE2 v2i64 multiply costs based off D46276 script
Simon Pilgrim via llvm-commits
- [llvm] f6ff2cc - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets (REAPPLIED)
Simon Pilgrim via llvm-commits
- [llvm] 78a0b2b - [GlobalIsel][X86] Regenerate legalize-add.mir with common CHECK prefix
Simon Pilgrim via llvm-commits
- [llvm] ca0aa44 - [GlobalIsel][X86] Update legalization of G_UADDE
Simon Pilgrim via llvm-commits
- [llvm] e0db1e8 - [GlobalIsel][X86] G_EXTRACT/G_INSERT subvector ops
Simon Pilgrim via llvm-commits
- [llvm] defb5cd - Fix MSVC "'std::max': no matching overloaded function found" error. NFCI.
Simon Pilgrim via llvm-commits
- [llvm] 43593a0 - [GlobalIsel][X86] Fix copy+pasta typo in the G_EXTRACT/G_INSERT legal type pairs
Simon Pilgrim via llvm-commits
- [llvm] e7169d0 - [GlobalIsel][X86] Add handling for G_CONCAT_VECTORS
Simon Pilgrim via llvm-commits
- [llvm] 4e4bd29 - [GlobalIsel][X86] Add handling for G_FRAME_INDEX/G_GLOBAL_VALUE
Simon Pilgrim via llvm-commits
- [llvm] b163efa - [GlobalIsel][X86] Add handling for G_LOAD/G_SEXTLOAD/G_ZEXTLOAD/G_STORE
Simon Pilgrim via llvm-commits
- [llvm] e2e4f67 - [GlobalIsel][X86] Add handling for G_MERGE_VALUES/G_UNMERGE_VALUES
Simon Pilgrim via llvm-commits
- [llvm] 46b8cbb - [GlobalIsel][X86] Avoid IMPLICIT_DEF in irregular types for CTTZ/CTLZ legalization tests
Simon Pilgrim via llvm-commits
- [llvm] 29293e6 - [GlobalISel][X86] Add i128 add/sub test coverage for narrowing on x86_64 triples
Simon Pilgrim via llvm-commits
- [llvm] cad1eef - [GlobalISel][X86] Add s8/s16/s64 handling of G_UADDE opcodes
Simon Pilgrim via llvm-commits
- [llvm] 91afb4b - [GlobalISel][X86] Add handling of scalar G_USUBE opcodes
Simon Pilgrim via llvm-commits
- [llvm] 0342aef - [GlobalISel][X86] Add handling of scalar G_UADDO/G_USUBO opcodes
Simon Pilgrim via llvm-commits
- [llvm] d7464ea - [X86] Regenerate add32ri8.ll
Simon Pilgrim via llvm-commits
- [llvm] e1164c7 - [X86] Regenerate tls.ll and reuse common linux check prefixes
Simon Pilgrim via llvm-commits
- [llvm] 46479ea - [GlobalIsel][X86] Regenerate srem/urem select test coverage
Simon Pilgrim via llvm-commits
- [llvm] fb60dda - [GlobalIsel][X86] selectDivRem - fix typo in 64-bit AH handling code
Simon Pilgrim via llvm-commits
- [PATCH] D152675: [DAGCombine] Use `IsKnownNeverZero` to see if we need zero-check in is_pow2 setcc patern
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152674: [X86] Add tests for optimizing out zero-check in is_pow2 setcc pattern; NFC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152430: [DAG] Peek through freeze when deciding whether we should convert setcc to math or not.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152357: MachineConstantPool::getConstantPoolIndex - don't reuse mismatched constants contained undef/poison (Issue #63108)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D151807: [InstCombine] Revisit user of newly one-use instructions
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D127115: [DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152357: MachineConstantPool::getConstantPoolIndex - don't reuse mismatched constants contained undef/poison (Issue #63108)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D150311: [MISched] Use StartAtCycle in trace dumps.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152800: [MISched][scheduleDump] Use stable_sort to prevent test failures.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152116: [DAGCombiner] Transform `(icmp eq/ne (and X,C0),(shift X,C1))` to use rotate or to getter constants.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D151358: [LegalizeTypes] Improve expansion of wide SMIN/SMAX/UMIN/UMAX
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152276: [DAGCombine] Fold (store (insert_elt (load p)) x p) -> (store x)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152541: [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D151055: [PowerPC] Use ABDU to replace ABDS when operands are known to be zero extended
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152928: [RFC][DAG] Initially add nodes in the worklist in topological order.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143018: [DAGCombiner][NFC] Factor out ByteProvider
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143018: [DAGCombiner][NFC] Factor out ByteProvider
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143018: [DAGCombiner][NFC] Factor out ByteProvider
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D153103: [m68k] Fix incorrect handling of TLS when matching addressing mode.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143018: [DAGCombiner][NFC] Factor out ByteProvider
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152926: [DAGCombine] Support truncated constants for fptosi.sat combining
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] 10e4228 - [ARM,AArch64] Add a full set of -mtp= options.
Simon Tatham via llvm-commits
- [PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.
Simon Tatham via Phabricator via llvm-commits
- [llvm] 0e444c5 - Remove dead conditionals
Sindhu Chittireddy via llvm-commits
- [PATCH] D152689: [NFC] Remove dead conditionals
Sindhu Chittireddy via Phabricator via llvm-commits
- [PATCH] D152689: [NFC] Remove dead conditionals
Sindhu Chittireddy via Phabricator via llvm-commits
- [PATCH] D152689: [NFC] Remove dead conditionals
Sindhu Chittireddy via Phabricator via llvm-commits
- [PATCH] D152689: [NFC] Remove dead conditionals
Sindhu Chittireddy via Phabricator via llvm-commits
- [PATCH] D152826: [AArch64] Improve shuffles of i1 vectors (WIP)
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D152949: [RFC] Assembly Code Super Optimiser
Sjoerd Meijer via Phabricator via llvm-commits
- [llvm] e2903ab - [AMDGPU] Remove integer division in VOPD checks
Stanislav Mekhanoshin via llvm-commits
- [llvm] 4b111dd - [AMDGPU] Fix VOPD dependency checks during combine
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpenv.ll
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152613: [AMDGPU] Remove integer division in VOPD checks
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152766: AMDGPU: Use correct lowering for llvm.log2.f32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152766: AMDGPU: Use correct lowering for llvm.log2.f32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152766: AMDGPU: Use correct lowering for llvm.log2.f32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152943: [AMDGPU] Fix VOPD dependency checks during combine
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152943: [AMDGPU] Fix VOPD dependency checks during combine
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D153022: AMDGPU: Use correct lowering for llvm.log2.f32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D153023: AMDGPU: Correctly lower llvm.log.f32 and llvm.log10.f32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152766: AMDGPU: Use correct lowering for llvm.log2.f32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D153024: AMDGPU: Correctly lower llvm.exp2.f32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152679: [RISCV] Eliminate the extension of index for vector indexed load/store.
Stefan O'Rear via Phabricator via llvm-commits
- [PATCH] D152911: [PowerPC] Remove extend between shift and and
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D153034: [PowerPC][Future] Enable __builtin_mma_xxm[t|f]acc on future isa
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D152708: [RFC][Draft] Enable primitive support for Two-Level Line Tables in LLVM
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D152708: [RFC][Draft] Enable primitive support for Two-Level Line Tables in LLVM
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Steven Johnson via Phabricator via llvm-commits
- [llvm] 03e8637 - [CMake] Add missing dependency in llvm Support unittests
Steven Wu via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as`
Steven Wu via Phabricator via llvm-commits
- [PATCH] D152924: [libLTO][AIX] Respect `-f[no]-integrated-as` on AIX
Steven Wu via Phabricator via llvm-commits
- [PATCH] D153048: [CMake] Add missing dependency in llvm Support unittests
Steven Wu via Phabricator via llvm-commits
- [PATCH] D153051: [Support][Unix] create_directory should fail if the path is not directory
Steven Wu via Phabricator via llvm-commits
- [PATCH] D153051: [Support][Unix] create_directory should fail if the path is not directory
Steven Wu via Phabricator via llvm-commits
- [PATCH] D153048: [CMake] Add missing dependency in llvm Support unittests
Steven Wu via Phabricator via llvm-commits
- [PATCH] D153048: [CMake] Add missing dependency in llvm Support unittests
Steven Wu via Phabricator via llvm-commits
- [PATCH] D153048: [CMake] Add missing dependency in llvm Support unittests
Steven Wu via Phabricator via llvm-commits
- [PATCH] D152574: [Orc][Coff] Skip registration of voltbl sections
Sunho Kim via Phabricator via llvm-commits
- [PATCH] D152552: [CodeGenPrepare] Implement releaseMemory
Sven van Haastregt via Phabricator via llvm-commits
- [PATCH] D153118: CurInst is not initialized to nullptr, may exist in wild pointer access
SylvanasX via Phabricator via llvm-commits
- [PATCH] D153118: [Interpreter] ExecutionContext CurInst is not initialized to nullptr, may exist in wild pointer access
SylvanasX via Phabricator via llvm-commits
- [PATCH] D153118: [Interpreter] ExecutionContext Caller is not initialized to nullptr, may exist in wild pointer access and clang-format
SylvanasX via Phabricator via llvm-commits
- [PATCH] D152817: [MISched] Fix non-debug builds.
Sylvestre Ledru via Phabricator via llvm-commits
- [PATCH] D152741: [WPD] implement -fskip-vtable-filepaths
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D152973: [gold] Add preliminary FatLTO support to the Gold plugin
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D150880: [RFC, FileCheck] Allow AP value for numeric expressions
Thomas Preud'homme via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Thorsten via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Thorsten via Phabricator via llvm-commits
- [PATCH] D153164: [AArch64][GlobalISel] Select G_UADDE/G_SADDE/G_USUBE/G_SSUBE
Thorsten via Phabricator via llvm-commits
- [PATCH] D153164: [AArch64][GlobalISel] Select G_UADDE/G_SADDE/G_USUBE/G_SSUBE
Thorsten via Phabricator via llvm-commits
- [PATCH] D152997: [DAG] Unroll opereand when its type is illegal for ldexp.
Tianle Liu via Phabricator via llvm-commits
- [PATCH] D153104: [DAG] Unroll and expand illegal result of LDEXP and POWI instead of widen.
Tianle Liu via Phabricator via llvm-commits
- [PATCH] D153104: [DAG] Unroll and expand illegal result of LDEXP and POWI instead of widen.
Tianle Liu via Phabricator via llvm-commits
- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D152795: [ARM] generate eXecute Only code for immidiates, globals, externals
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D152795: [ARM] generate eXecute Only code for immidiates, globals, externals
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D152795: [ARM] generate eXecute Only code for immidiates, globals, externals
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D152789: NVPTX: Lower unreachable to exit to allow ptxas to accurately reconstruct the CFG.
Tim Besard via Phabricator via llvm-commits
- [PATCH] D153127: Don't add the structurizer pass.
Tim Besard via Phabricator via llvm-commits
- [PATCH] D153127: Don't add the structurizer pass.
Tim Besard via Phabricator via llvm-commits
- [PATCH] D152789: NVPTX: Lower unreachable to exit to allow ptxas to accurately reconstruct the CFG.
Tim Besard via Phabricator via llvm-commits
- [PATCH] D152789: NVPTX: Lower unreachable to exit to allow ptxas to accurately reconstruct the CFG.
Tim Besard via Phabricator via llvm-commits
- [PATCH] D152789: NVPTX: Lower unreachable to exit to allow ptxas to accurately reconstruct the CFG.
Tim Besard via Phabricator via llvm-commits
- [PATCH] D145767: [Verifier][NFC] Refactor check for associated metadata to allow multiple operands on AIX
Ting Wang via Phabricator via llvm-commits
- [PATCH] D153164: [AArch64][GlobalISel] Select G_UADDE/G_SADDE/G_USUBE/G_SSUBE
Tobias Stadler via Phabricator via llvm-commits
- [PATCH] D153165: Select `G_SADDE`, `G_UADDE`, `G_SSUBE` and `G_USUBE` for AArch64
Tobias Stadler via Phabricator via llvm-commits
- [PATCH] D153164: [AArch64][GlobalISel] Select G_UADDE/G_SADDE/G_USUBE/G_SSUBE
Tobias Stadler via Phabricator via llvm-commits
- [PATCH] D153164: [AArch64][GlobalISel] Select G_UADDE/G_SADDE/G_USUBE/G_SSUBE
Tobias Stadler via Phabricator via llvm-commits
- [PATCH] D153164: [AArch64][GlobalISel] Select G_UADDE/G_SADDE/G_USUBE/G_SSUBE
Tobias Stadler via Phabricator via llvm-commits
- [PATCH] D95727: llvm-shlib: Create object libraries for each component and link against them
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D95727: llvm-shlib: Create object libraries for each component and link against them
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D153166: AMDGPU: Remove add_dependencies calls from CMakeLists.txt
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D152709: [lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D153125: [lit] Likely fix for symlink path failures after D152709
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D153138: [lit] Revert migration from os.path.realpath to os.path.abspath
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D153125: [lit] Likely fix for symlink path failures after D152709
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D149548: [IR] Update to use new shufflevector semantics
Ulrich Weigand via Phabricator via llvm-commits
- [PATCH] D149548: [IR] Update to use new shufflevector semantics
Ulrich Weigand via Phabricator via llvm-commits
- [PATCH] D152920: [SystemZ][z/OS] Correct value of length/4 of params field in PPA1.
Ulrich Weigand via Phabricator via llvm-commits
- [PATCH] D151711: PowerPC/SPE: Grab the emergency slot for the vreg(that was created by the eliminateFramePointer)
Umesh Kalappa via Phabricator via llvm-commits
- [PATCH] D145284: WIP [clang] adds capabilities for SARIF to be written to file
Vaibhav Yenamandra via Phabricator via llvm-commits
- [llvm] ae86fe8 - [flang][openacc] Add parser support for the force modifier in the collapse clause
Valentin Clement via llvm-commits
- [llvm] 5923e46 - [flang][openacc] Add parsing support for dim in gang clause
Valentin Clement via llvm-commits
- [PATCH] D151974: [flang][openacc] Add parser support for the force modifier in the collapse clause
Valentin Clement via Phabricator via llvm-commits
- [PATCH] D151972: [flang][openacc] Add parsing support for dim in gang clause
Valentin Clement via Phabricator via llvm-commits
- [PATCH] D151972: [flang][openacc] Add parsing support for dim in gang clause
Valentin Clement via Phabricator via llvm-commits
- [PATCH] D151972: [flang][openacc] Add parsing support for dim in gang clause
Valentin Clement via Phabricator via llvm-commits
- [PATCH] D151972: [flang][openacc] Add parsing support for dim in gang clause
Valentin Clement via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Valery Pykhtin via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Valery Pykhtin via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Valery Pykhtin via Phabricator via llvm-commits
- [llvm] 9d54668 - [SLP][NFC] Precommit test that exposes a bug in ShuffleBuilder.
Vasileios Porpodas via llvm-commits
- [PATCH] D152868: [SLP][NFC] Precommit test that exposes a bug in ShuffleBuilder.
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D152868: [SLP][NFC] Precommit test that exposes a bug in ShuffleBuilder.
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D152871: [SLP] Fixes bug in ShuffleBuilder when duplicate entry already exists.
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
Vedant Paranjape via Phabricator via llvm-commits
- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
Vedant Paranjape via Phabricator via llvm-commits
- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
Vedant Paranjape via Phabricator via llvm-commits
- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
Vedant Paranjape via Phabricator via llvm-commits
- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
Vedant Paranjape via Phabricator via llvm-commits
- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
Vedant Paranjape via Phabricator via llvm-commits
- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
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- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
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- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
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- [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet
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- [llvm] dbbd627 - [RISCV][NFC] Improve encoding/decoding tests for Zbb instructions
Venkata Ramanaiah Nalamothu via llvm-commits
- [PATCH] D152680: [RISCV][NFC] Improve encoding/decoding tests for Zbb instructions
Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
- [PATCH] D152680: [RISCV][NFC] Improve encoding/decoding tests for Zbb instructions
Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
- [PATCH] D152680: [RISCV][NFC] Improve encoding/decoding tests for Zbb instructions
Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
- [compiler-rt] e7e6088 - [test][HWASAN] Trim leading zeros from hex value
Vitaly Buka via llvm-commits
- [llvm] 23ea58f - Revert "[SCCP] Replace new value's value state with removed value's"
Vitaly Buka via llvm-commits
- [compiler-rt] 0518135 - [NFC][sanitizer] Move ArrayRef into own header
Vitaly Buka via llvm-commits
- [llvm] 679d9ea - [NFC][sanitizer] Rename sanitizer_common_range -> sanitizer_range
Vitaly Buka via llvm-commits
- [llvm] eae59ae - [NFC][sanitizer] Move ArrayRef into own header
Vitaly Buka via llvm-commits
- [compiler-rt] f35d060 - [test][sanitizer] Add ArrayRef tests
Vitaly Buka via llvm-commits
- [compiler-rt] c3c37a6 - [test][sanitizer] Unsupport test on Android
Vitaly Buka via llvm-commits
- [compiler-rt] 78c6d2f - [NFC][sanitizer] Fix build on Windows
Vitaly Buka via llvm-commits
- [compiler-rt] d8a3070 - [test][sanitizer] Remove test missing include
Vitaly Buka via llvm-commits
- [compiler-rt] 5360258 - [test][sanitizer] Fix test on windows
Vitaly Buka via llvm-commits
- [compiler-rt] a37bd13 - [test][sanitizer] Fix test on windows
Vitaly Buka via llvm-commits
- [compiler-rt] 08dd72d - [test][asan] Remove XFAIL after D152604
Vitaly Buka via llvm-commits
- [compiler-rt] 4a69e0a - [test][hwasan] Rename constants in test
Vitaly Buka via llvm-commits
- [compiler-rt] c93ca4b - [test][hwasan] Allow test for any platform with tagging
Vitaly Buka via llvm-commits
- [compiler-rt] aeb13a4 - [test][hwasan] Use perror and abort in test
Vitaly Buka via llvm-commits
- [compiler-rt] ad1dd78 - [hwasan] Fixup mmap tagging regions
Vitaly Buka via llvm-commits
- [PATCH] D152337: [SCCP] Replace new value's value state with removed value's
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D152337: [SCCP] Replace new value's value state with removed value's
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D153171: [SpecialCaseList] Remove TrigramIndex
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D153171: [SpecialCaseList] Remove TrigramIndex
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D152663: [asan] Fix shadow load alignment for unaligned 128-bit load/store
Vitaly Cheptsov via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Vlad Serebrennikov via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Vlad Serebrennikov via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Vlad Serebrennikov via Phabricator via llvm-commits
- [llvm] ed506dd - [DebugMetadata] Simplify handling subprogram's retainedNodes field. NFCI (1/7)
Vladislav Dzhidzhoev via llvm-commits
- [llvm] 40b2eb6 - [DwarfDebug] Move emission of imported entities from beginModule() to endModule() (2/7)
Vladislav Dzhidzhoev via llvm-commits
- [llvm] d04452d - [DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)
Vladislav Dzhidzhoev via llvm-commits
- [llvm] a7e7d34 - Revert "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"
Vladislav Dzhidzhoev via llvm-commits
- [llvm] ed578f0 - [DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)
Vladislav Dzhidzhoev via llvm-commits
- [llvm] 77f8f40 - Revert "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"
Vladislav Dzhidzhoev via llvm-commits
- [llvm] d80fdc6 - [DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)
Vladislav Dzhidzhoev via llvm-commits
- [llvm] fbdeb8c - Revert "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"
Vladislav Dzhidzhoev via llvm-commits
- [llvm] fcc3981 - Reland "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"
Vladislav Dzhidzhoev via llvm-commits
- [llvm] b8ea03a - Revert "Reland "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)""
Vladislav Dzhidzhoev via llvm-commits
- [llvm] 06a0ae6 - Reland "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"
Vladislav Dzhidzhoev via llvm-commits
- [PATCH] D143984: [DebugMetadata] Simplify handling subprogram's retainedNodes field. NFCI (1/7)
Vladislav Dzhidzhoev via Phabricator via llvm-commits
- [PATCH] D141870: [DAG] Fold Op(vecreduce(a), vecreduce(b)) into vecreduce(Op(a,b))
Vladislav Dzhidzhoev via Phabricator via llvm-commits
- [PATCH] D143985: [DwarfDebug] Move emission of imported entities from beginModule() to endModule() (2/7)
Vladislav Dzhidzhoev via Phabricator via llvm-commits
- [PATCH] D143985: [DwarfDebug] Move emission of imported entities from beginModule() to endModule() (2/7)
Vladislav Dzhidzhoev via Phabricator via llvm-commits
- [PATCH] D144004: [DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)
Vladislav Dzhidzhoev via Phabricator via llvm-commits
- [llvm] 11ebe3d - [RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation
Volodymyr Sapsai via llvm-commits
- [llvm] e872e16 - Revert "[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation"
Volodymyr Sapsai via llvm-commits
- [llvm] 11ebe3d - [RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation
Volodymyr Sapsai via llvm-commits
- [llvm] 5b1c62c - [MC][MachO]Do not emit DWARF for no-personality case
Vy Nguyen via llvm-commits
- [PATCH] D152540: [MC][MachO]Do not emit DWARF for no-personality case
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D152540: [MC][MachO]Do not emit DWARF for no-personality case
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D152540: [MC][MachO]Do not emit DWARF for no-personality case
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D152540: [MC][MachO]Do not emit DWARF for no-personality case
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D144999: [Clang][MC][MachO]Only emits compact-unwind format for "canonical" personality symbols. For the rest, use DWARFs.
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D144999: [Clang][MC][MachO]Only emits compact-unwind format for "canonical" personality symbols. For the rest, use DWARFs.
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D152998: [WIP][TableGen] Support named arguments
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D153000: [WIP][RISCV] Make all floating-point instructions SEW-aware
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] df06594 - [llvm-gsymutil] Fix command descriptions introduced in upstream D148775 when switching to OptTable
Wanyi Ye via llvm-commits
- [PATCH] D153086: [llvm-gsymutil] Fix command descriptions introduced in upstream D148775 when switching to OptTable
Wanyi Ye via Phabricator via llvm-commits
- [PATCH] D153086: [llvm-gsymutil] Fix command descriptions introduced in upstream D148775 when switching to OptTable
Wanyi Ye via Phabricator via llvm-commits
- [PATCH] D153086: [llvm-gsymutil] Fix command descriptions introduced in upstream D148775 when switching to OptTable
Wanyi Ye via Phabricator via llvm-commits
- [llvm] 06cdc6f - [LoongArch] Ignore warnings when there is no environment in triple
Weining Lu via llvm-commits
- [llvm] 4024193 - [LoongArch] Some cleanup and readability improvements to LoongArchISelLowering.cpp, NFC
Weining Lu via llvm-commits
- [llvm] 4a69fd6 - [LoongArch][NFC] Precommit test for D153120 (the fix of CSRWR and CSRXCHG)
Weining Lu via llvm-commits
- [llvm] c216ce0 - [LoongArch] Fix handling of the chain of CSRWR and CSRXCHG nodes
Weining Lu via llvm-commits
- [llvm] 54711a6 - [LoopSink] Allow sinking to PHI-use
Wenlei He via llvm-commits
- [PATCH] D152595: [PseudoProbe] Disgard probes for dead functions.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into MBFI.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D147968: [TTI][BPF]: Undo specific transform-preventing passes and add one TTI hook
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152772: [LoopSink] Allow sinking to PHI-use
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into MBFI.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152758: [NFC] Refactor MBB hotness/coldness into templated PSI functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D152490: [llvm-profdata] Use StringRef for CallTargetMap
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D152490: [llvm-profdata] Use StringRef for CallTargetMap
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D152934: [LoopIdiom] Preserve alias information for memset_pattern
William Moses via Phabricator via llvm-commits
- [PATCH] D152934: [LoopIdiom] Preserve alias information for memset_pattern
William Moses via Phabricator via llvm-commits
- [PATCH] D152934: [LoopIdiom] Preserve alias information for memset_pattern
William Moses via Phabricator via llvm-commits
- [PATCH] D152934: [LoopIdiom] Preserve alias information for memset_pattern
William Moses via Phabricator via llvm-commits
- [llvm] 3eb6fef - [LoopIdiom] Preserve alias information for memset_pattern
William S. Moses via llvm-commits
- [PATCH] D152778: [LoongArch] Ignore warnings when there are no environment in triple
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D152778: [LoongArch] Ignore warnings when there are no environment in triple
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D152778: [LoongArch] Ignore warnings when there is no environment in triple
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D153119: [LoongArch][NFC] Precommit test for D153120 (the fix of CSRWR and CSRXCHG)
Xi Ruoyao via Phabricator via llvm-commits
- [PATCH] D153193: [LoongArch] Optimize conditional selection of integer
Xi Ruoyao via Phabricator via llvm-commits
- [PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D153159: [RISCV] Add errors for mixing Zcmp with C/Zcd and D.
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D153107: [llvm-c] Add LLVMSetTailCallKind and LLVMGetTailCallKind
YAMAMOTO Takashi via Phabricator via llvm-commits
- [llvm] cca42ff - [docs] Fix link for static constructors article
Yashwant Singh via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D153061: docs: fix link for static constructors article
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D153061: docs: fix link for static constructors article
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D153061: docs: fix link for static constructors article
Yashwant Singh via Phabricator via llvm-commits
- [llvm] c0f0d50 - [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Yaxun Liu via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D152882: [LinkerWrapper] Support device binaries in multiple link jobs
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D151545: [ASAN] Support memeory check for masked.gather/scatter.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D151713: [ASAN] Support asan for masked.expandload/compressstore.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D152793: [RISCV] Add MC layer support for Zicfisslp.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D152793: [RISCV] Add MC layer support for Zicfisslp.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.
Yeting Kuo via Phabricator via llvm-commits
- [llvm] 1ebbbf1 - [LoopUnrollRuntime] Allow indirect transition to deopt non-latch exit blocks
Yevgeny Rouban via llvm-commits
- [PATCH] D152639: [LoopUnrollRuntime] Allow simple transition to deopt non-latch exit blocks
Yevgeny Rouban via Phabricator via llvm-commits
- [PATCH] D152639: [LoopUnrollRuntime] Allow simple transition to deopt non-latch exit blocks
Yevgeny Rouban via Phabricator via llvm-commits
- [PATCH] D152899: Introduce RThreadAccess pass
Yevgeny Rouban via Phabricator via llvm-commits
- [PATCH] D152639: [LoopUnrollRuntime] Allow simple transition to deopt non-latch exit blocks
Yevgeny Rouban via Phabricator via llvm-commits
- [PATCH] D152639: [LoopUnrollRuntime] Allow simple transition to deopt non-latch exit blocks
Yevgeny Rouban via Phabricator via llvm-commits
- [llvm] 315e300 - [CodeGenPrepare][RISCV] Remove asserting VH references before erasing the dead GEP
Yingwei Zheng via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + zext(B)) & X` into `B ? 0 : X` where B is effectively a bool
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D153194: [CodeGenPrepare][RISCV] Remove asserting VH references before erasing the dead GEP
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D153194: [CodeGenPrepare][RISCV] Remove asserting VH references before erasing the dead GEP
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D147968: [TTI][BPF]: Undo specific transform-preventing passes and add one TTI hook
Yonghong Song via Phabricator via llvm-commits
- [PATCH] D149058: [BPF][DebugInfo] Use .BPF.ext for line info when DWARF is not available
Yonghong Song via Phabricator via llvm-commits
- [PATCH] D152987: [BPF] Propagate NoMerge attribute when lowering function calls
Yonghong Song via Phabricator via llvm-commits
- [PATCH] D139152: [SLPVectorizer] Don't deref std::end() of object
Youngsuk Kim via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151395: [1/3][RISCV] Define machine instruction to write an immediate into vxrm
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152889: [RISCV] Model vxrm control for vsadd, vsaddu, vssub, and vssubu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152889: [RISCV] Model vxrm control for vsadd, vsaddu, vssub, and vssubu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151395: [1/3][RISCV] Define machine instruction to write an immediate into vxrm
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [1/2][RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [1/2][RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152889: [2/2][RISCV] Model vxrm control for vsadd, vsaddu, vssub, and vssubu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152937: [RISCV] Document overview of vector psuedos [nfc]
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152889: [2/2][RISCV] Model vxrm control for vsadd, vsaddu, vssub, and vssubu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [1/2][RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [1/2][RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152889: [2/2][RISCV] Model vxrm control for vsadd, vsaddu, vssub, and vssubu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152879: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151283: [WIP][llvm-cov] Support a Hierarchical Structure for `show --format=html` (WORK IN PROGRESS)
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D151283: [WIP][llvm-cov] Support a Hierarchical Structure for `show --format=html` (WORK IN PROGRESS)
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D151283: [WIP][llvm-cov] Support a Hierarchical Structure for `show --format=html` (WORK IN PROGRESS)
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D151283: [WIP][llvm-cov] Support a Hierarchical Structure for `show --format=html` (WORK IN PROGRESS)
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D151283: [WIP][llvm-cov] Support a Hierarchical Structure for `show --format=html` (WORK IN PROGRESS)
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D151283: [WIP][llvm-cov] Support a Hierarchical Structure for `show --format=html` (WORK IN PROGRESS)
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D151283: [WIP][llvm-cov] Support a Hierarchical Structure for `show --format=html` (WORK IN PROGRESS)
Yury Bura via Phabricator via llvm-commits
- [llvm] d90468d - [CSKY] Add support for half-precision floats
Zi Xuan Wu via llvm-commits
- [PATCH] D147783: [VPlan] Add stride->constant VPlan mapping at construction.
Zixuan Wu via Phabricator via llvm-commits
- [PATCH] D147783: [VPlan] Add stride->constant VPlan mapping at construction.
Zixuan Wu via Phabricator via llvm-commits
- [PATCH] D150133: [RISCV] Support constant immediate for la pseudo instruction
garvit gupta via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D152778: [LoongArch] Ignore warnings when there are no environment in triple
hev via Phabricator via llvm-commits
- [PATCH] D152778: [LoongArch] Ignore warnings when there are no environment in triple
hev via Phabricator via llvm-commits
- [PATCH] D152778: [LoongArch] Ignore warnings when there are no environment in triple
hev via Phabricator via llvm-commits
- [PATCH] D153120: [LoongArch] Fix handling of the chain of CSRWR and CSRXCHG nodes
hev via Phabricator via llvm-commits
- [PATCH] D153193: [LoongArch] Optimize conditional selection of integer
hev via Phabricator via llvm-commits
- [PATCH] D153193: [LoongArch] Optimize conditional selection of integer
hev via Phabricator via llvm-commits
- [PATCH] D153193: [LoongArch] Optimize conditional selection of integer
hev via Phabricator via llvm-commits
- [PATCH] D152773: [SCCP] Propagate undef when visiting some instructions
luxufan via Phabricator via llvm-commits
- [PATCH] D152774: [CVP] Don't process sext or ashr if value state including undefsimilar to D152773
luxufan via Phabricator via llvm-commits
- [PATCH] D152773: [SCCP] Propagate undef when visiting some instructions
luxufan via Phabricator via llvm-commits
- [PATCH] D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate
luxufan via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
mgabka via Phabricator via llvm-commits
- [PATCH] D152005: [SVE ACLE] Implement IR combines to convert intrinsics used for _m C/C++ builtins
mgabka via Phabricator via llvm-commits
- [PATCH] D145218: PHI-def LIveInterval's LaneMask can be calculated by subranges LaneMask when Reg has SubRanges.
michael_zhang via Phabricator via llvm-commits
- [PATCH] D145218: PHI-def LIveInterval's LaneMask can be calculated by subranges LaneMask when Reg has SubRanges.
michael_zhang via Phabricator via llvm-commits
- [PATCH] D145218: PHI-def LIveInterval's LaneMask can be calculated by subranges LaneMask when Reg has SubRanges.
michael_zhang via Phabricator via llvm-commits
- [PATCH] D145218: PHI-def LIveInterval's LaneMask can be calculated by subranges LaneMask when Reg has SubRanges.
michael_zhang via Phabricator via llvm-commits
- [PATCH] D145218: PHI-def LIveInterval's LaneMask can be calculated by subranges LaneMask when Reg has SubRanges.
michael_zhang via Phabricator via llvm-commits
- [PATCH] D145218: PHI-def LIveInterval's LaneMask can be calculated by subranges LaneMask when Reg has SubRanges.
michael_zhang via Phabricator via llvm-commits
- [PATCH] D153165: Select `G_SADDE`, `G_UADDE`, `G_SSUBE` and `G_USUBE` for AArch64
niwin anto via Phabricator via llvm-commits
- [PATCH] D153165: Select `G_SADDE`, `G_UADDE`, `G_SSUBE` and `G_USUBE` for AArch64
niwin anto via Phabricator via llvm-commits
- [PATCH] D151511: [CMake] Enable building with UBSAN + clang-cl on windows
pierre gousseau via Phabricator via llvm-commits
- [PATCH] D151511: [CMake] Enable building with UBSAN + clang-cl on windows
pierre gousseau via Phabricator via llvm-commits
- [PATCH] D152722: [llvm] Intoduce llvm-orderfil
serge via Phabricator via llvm-commits
- [PATCH] D152722: [llvm] Intoduce llvm-orderfil
serge via Phabricator via llvm-commits
- [PATCH] D152722: [llvm] Intoduce llvm-orderfile
serge via Phabricator via llvm-commits
- [PATCH] D153073: [LLDB] Add DWARF definitions for the new Mojo language
walter erquinigo via Phabricator via llvm-commits
- [llvm] 3604fdf - [AMDGPU] Do not assume stack size for PAL code object indirect calls
via llvm-commits
- [llvm] 9dcae2f - [DebugInfo] Add DW_ATE_complex_float case to assert in isUnsignedDIType
via llvm-commits
- [llvm] 772847a - [NFC] Combine several DW_AT_const_value tests
via llvm-commits
- [llvm] 22f5dc7 - [IR] Update to use new shufflevector semantics
via llvm-commits
- [llvm] e108aee - [test] Update the checking base for LE and BE
via llvm-commits
- [llvm] 43b2df0 - [LegalizeTypes][AArch64] Use scalar_to_vector to eliminate bitcast
via llvm-commits
- [llvm] 028a261 - [XCOFF] FixupOffsetInCsect should be 0 for R_REF relocation.
via llvm-commits
- [llvm] 56c2557 - [1/3][RISCV] Define machine instruction to write an immediate into vxrm
via llvm-commits
- [llvm] 12fee61 - [RISCV] Fold special case (xor (setcc constant, y, setlt), 1) -> (setcc y, constant + 1, setlt)
via llvm-commits
- [llvm] f2d9f84 - [SCCP][NFC] Regenerate test case
via llvm-commits
- [llvm] 22224ac - [SCCP][NFC] Regenerate test case
via llvm-commits
- [llvm] 18eb31c - [SCCP][NFC] Regenerate test case
via llvm-commits
Last message date:
Sun Jun 18 23:57:52 PDT 2023
Archived on: Sun Jun 18 23:57:55 PDT 2023
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