[PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode

[Nitin John Raj via Phabricator via llvm-commits]

nitinjohnraj updated this revision to Diff 532041.
nitinjohnraj added a comment.

Changed order of case statements to match the enum constructor order


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153057/new/

https://reviews.llvm.org/D153057

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vwmaccsu-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vwmaccus-vp.ll

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