[PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


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Comment at: llvm/include/llvm/IR/IRBuilder.h:761
+  /// vector. This variant supports NaNs and signed zeroes (as the llvm.maximum
+  /// intrinsic).
+  CallInst *CreateFPMaximumReduce(Value *Src);
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"supports NaNs and signed zeros" -> "follows the NaN and signed zero semantics of llvm.maximum" or so.


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Comment at: llvm/test/CodeGen/AArch64/vecreduce-fmaximum.ll:20
+; CHECK-NEXT:    ret
+  %b = call nnan half @llvm.vector.reduce.fmaximum.v1f16(<1 x half> %a)
+  ret half %b
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Why do these all have `nnan` fmf?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152370/new/

https://reviews.llvm.org/D152370