[PATCH] D153129: [AArch64][RCPC3] Instruction selection for LDAP1/STL1 instructions

[Lucas Prates via Phabricator via llvm-commits]

pratlucas created this revision.
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This implements the DAG patterns to enable instruction selection for the
LDAP1 and STL1 instructions from FEAT_LRCPC3. The instructions should
match the following combinations:

- Aqcuiring atomic load + vector insert element for LDAP1.
- Vector extract element + releasing atomic store for STL1.

Patterns have also been added to cope with the DAG structure found when
dealing with 1-lane sub-vectors.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D153129

Files:
  llvm/lib/Target/AArch64/AArch64InstrAtomics.td
  llvm/test/CodeGen/AArch64/rcpc3.ll

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