[llvm] c1f81ac - [SLP][X86] Add test coverage for Issue #62969

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 13 08:36:27 PDT 2023


Author: Simon Pilgrim
Date: 2023-06-13T16:36:13+01:00
New Revision: c1f81ac2c1a7938f2afad03b8c878764adbbb5f3

URL: https://github.com/llvm/llvm-project/commit/c1f81ac2c1a7938f2afad03b8c878764adbbb5f3
DIFF: https://github.com/llvm/llvm-project/commit/c1f81ac2c1a7938f2afad03b8c878764adbbb5f3.diff

LOG: [SLP][X86] Add test coverage for Issue #62969

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/mul64.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/mul64.ll b/llvm/test/Transforms/SLPVectorizer/X86/mul64.ll
new file mode 100644
index 0000000000000..d764d5c05a2f6
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/mul64.ll
@@ -0,0 +1,50 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer -S -mcpu=x86-64 | FileCheck %s --check-prefix=SCALAR
+; RUN: opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer -S -mcpu=x86-64-v2 | FileCheck %s
+; RUN: opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer -S -mcpu=x86-64-v3 | FileCheck %s
+; RUN: opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer -S -mcpu=x86-64-v4 | FileCheck %s
+
+define void @PR62969(ptr dereferenceable(16) %out, ptr dereferenceable(16) %in) {
+; SCALAR-LABEL: @PR62969(
+; SCALAR-NEXT:    [[IN0:%.*]] = getelementptr inbounds [2 x i64], ptr [[IN:%.*]], i64 0, i64 0
+; SCALAR-NEXT:    [[IN1:%.*]] = getelementptr inbounds [2 x i64], ptr [[IN]], i64 0, i64 1
+; SCALAR-NEXT:    [[X:%.*]] = load i64, ptr [[IN0]], align 8
+; SCALAR-NEXT:    [[Y:%.*]] = load i64, ptr [[IN1]], align 8
+; SCALAR-NEXT:    [[XL:%.*]] = and i64 [[X]], 4294967295
+; SCALAR-NEXT:    [[YL:%.*]] = and i64 [[Y]], 4294967295
+; SCALAR-NEXT:    [[XH:%.*]] = lshr i64 [[X]], 32
+; SCALAR-NEXT:    [[YH:%.*]] = lshr i64 [[Y]], 32
+; SCALAR-NEXT:    [[M0:%.*]] = mul i64 [[XL]], [[XH]]
+; SCALAR-NEXT:    [[M1:%.*]] = mul i64 [[YL]], [[YH]]
+; SCALAR-NEXT:    [[OUT0:%.*]] = getelementptr inbounds [2 x i64], ptr [[OUT:%.*]], i64 0, i64 0
+; SCALAR-NEXT:    [[OUT1:%.*]] = getelementptr inbounds [2 x i64], ptr [[OUT]], i64 0, i64 1
+; SCALAR-NEXT:    store i64 [[M0]], ptr [[OUT0]], align 8
+; SCALAR-NEXT:    store i64 [[M1]], ptr [[OUT1]], align 8
+; SCALAR-NEXT:    ret void
+;
+; CHECK-LABEL: @PR62969(
+; CHECK-NEXT:    [[IN0:%.*]] = getelementptr inbounds [2 x i64], ptr [[IN:%.*]], i64 0, i64 0
+; CHECK-NEXT:    [[OUT0:%.*]] = getelementptr inbounds [2 x i64], ptr [[OUT:%.*]], i64 0, i64 0
+; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IN0]], align 8
+; CHECK-NEXT:    [[TMP2:%.*]] = and <2 x i64> [[TMP1]], <i64 4294967295, i64 4294967295>
+; CHECK-NEXT:    [[TMP3:%.*]] = lshr <2 x i64> [[TMP1]], <i64 32, i64 32>
+; CHECK-NEXT:    [[TMP4:%.*]] = mul <2 x i64> [[TMP2]], [[TMP3]]
+; CHECK-NEXT:    store <2 x i64> [[TMP4]], ptr [[OUT0]], align 8
+; CHECK-NEXT:    ret void
+;
+  %in0 = getelementptr inbounds [2 x i64], ptr %in, i64 0, i64 0
+  %in1 = getelementptr inbounds [2 x i64], ptr %in, i64 0, i64 1
+  %x = load i64, ptr %in0, align 8
+  %y = load i64, ptr %in1, align 8
+  %xl = and i64 %x, 4294967295
+  %yl = and i64 %y, 4294967295
+  %xh = lshr i64 %x, 32
+  %yh = lshr i64 %y, 32
+  %m0 = mul i64 %xl, %xh
+  %m1 = mul i64 %yl, %yh
+  %out0 = getelementptr inbounds [2 x i64], ptr %out, i64 0, i64 0
+  %out1 = getelementptr inbounds [2 x i64], ptr %out, i64 0, i64 1
+  store i64 %m0, ptr %out0, align 8
+  store i64 %m1, ptr %out1, align 8
+  ret void
+}


        


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