[PATCH] D153234: [RISCV] Add codegen for Zfbfmin instructions

Jun Sha via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 18 18:40:30 PDT 2023


joshua-arch1 created this revision.
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The implementation in https://reviews.llvm.org/D151313 is done for the circumstance without Zfbfmin. This patch adds codegen support for the 6 instructions provided in Zfbfmin extension.


https://reviews.llvm.org/D153234

Files:
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
  llvm/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/test/CodeGen/RISCV/zfbfmin.ll

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