[PATCH] D152940: [RISCV] Make all vector binops use the _TU pseudo form

[Craig Topper via Phabricator via llvm-commits]

craig.topper requested changes to this revision.
craig.topper added inline comments.
This revision now requires changes to proceed.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td:91
+                         instruction_name#"_VV_"# vlmul.MX#"_TU"))
+                     (op_type (IMPLICIT_DEF)),
                      op_reg_class:$rs1,
----------------
This should be `result_type`


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td:115
+                         instruction_name#_#suffix#_# vlmul.MX#"_TU"))
+                     (vop_type (IMPLICIT_DEF)),
                      vop_reg_class:$rs1,
----------------
`result_type`


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td:166
+                         instruction_name#"_"#vlmul.MX#"_TU"))
+                     (vop_type (IMPLICIT_DEF)),
                      vop_reg_class:$rs1,
----------------
result_type


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152940/new/

https://reviews.llvm.org/D152940