[PATCH] D152854: [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:781
+    assert(N->isVPOpcode() && "Expected VP opcode");
+    return DAG.getNode(N->getOpcode(), dl, NVT, N->getOperand(0),
+                       N->getOperand(1), N->getOperand(2));
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This could maybe do with a comment - I notice the code below has ` Otherwise, just extend the original operand  ...`. Does this apply here too?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152854/new/

https://reviews.llvm.org/D152854