[PATCH] D151916: [DAG] Peek through any trunc/zext when combining select into shifts.

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:2486
+
+    // Peek through any trunc/zext to shift amount type.
+    if ((BinOpcode == ISD::SHL || BinOpcode == ISD::SRA ||
----------------
Outdated comment about zext.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:2492
+      KnownBits Known;
+      if (isTruncateOf(DAG, Sel, Op, Known)) {
+        APInt TruncatedBits =
----------------
isTruncateOf() handles truncates and some kind of weird setcc pattern. Do we need/want that pattern here? Is there test coverage for it?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151916/new/

https://reviews.llvm.org/D151916