[PATCH] D145211: Relax cross-section branches
Daniel Hoekwater via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 13 10:45:45 PDT 2023
dhoekwater marked an inline comment as done.
dhoekwater added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:271-273
+ // Get a scratch register. It's important to get a virtual register because
+ // the register scavenger doesn't work with empty blocks.
+ Register ScratchReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
----------------
arsenm wrote:
> I think it would be better to just fix the scavenger to tolerate empty blocks.
Agreed, but I think this would best be done in a different patch. This same approach is used by [AMDGPU/SI](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp#L2556), [RISCV](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp#L1015), and [LoongArch](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp#L389).
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D145211/new/
https://reviews.llvm.org/D145211
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